4GB in Jetson TK1


I have made 4 boards with different memory chips that have the same pin out as the original jetson board memory. The memory is double the density of the original giving 4 gb of ram in each board. I have followed instructions found here GitHub - lgeek/jetson_hw_hacking: Jetson TK1 hardware hacking and have successfully booted with the same Hynix chip. I did change memtype parameter to 1 and add CONFIG_ZONE_DMA to the kernel conf. I would like to try the other chips I have here because sourcing the Hynix chip is very difficult. The BCT I am using is the BCT for the hynix because we have not found any other similar. They boot ok to 2GB parameters but when changing to 4 GB parameters kernel does not even start.

The models are :

Micron MT41K512M16HA-125:A
Nanya NT5CC256M16DP-D1
Alliance AS4C512M16D3L-12BIN

Any help is appreciated.



Hi iaponte,

You need to generate memory config for each chip firstly and then run shmoo test for the config to make certain it has no issue. There is an appnote doc in Jetson TK1 memory characterization package, you can check it and follow its instruction to generate CFG and test it.

Add link of package here for your reference:


I have same question as you.
I used micron M741K512M16HA.
It’d my tested before.

I think you also need update your BCT and DVFS for M741K512M16HA firstly. If not, TK1 will recognize it as 2GB DDR.

the ram is not supported by tk1. the hynix 8Gb chip is supported by tk1.
I known MT41K512M16HA-125:A is not ok because tk1 only support twin die 8Gb sdram.
MT41K512M16TNA-125 can be used.

Thank you, Asong.
I think that tk1 only support twin die 8Gb, that cause to halt when starting kernel.
It’s important message for me.
I will try it.

Hello Asong,

MT41K512M16TNA-125 is EOL and the replacement is MT41K512M16HA-125:A this was told to us directly by Micron representatives.


Several requests have been made for >= 4GB RAM support for Tegra K1. While we don’t provide support for this configuration, following are patches to enable LPAE in your kernel for experimentation purposes. Please note a known issue: PCIe may not function in this configuration because the SMMU is not enabled for PCIe. We have tested 4GB Hynix. And for any 4GB Memory, following things to be followed:

  1. Apply the two patches from the attachment to add support for 4GB memory in kernel.

  2. use a 4GB BCT for the memory you are using. That will never be same as what is used for Hynix. Size in BCT is decided by this parameter

SDRAM[0].McEmemCfg = 0x00000800; // 2GB
SDRAM[0].McEmemCfg = 0x00001000; //4GB

  1. You need EMC DVFS table for this 4GB memory. This is nothing but settings for the memory at different freq of embedded memory controller (EMC). If you dont have this. Then disable EMC_SCALING by removing this config from tegra12_defconfig

  2. kernel command line has to be updated mem=2048M@4096M memtype=1

First option is to add another 2GB for the 2nd die. So total will be 4GB. Second option is to select correct EMC DVFS table. See function ardbeg_emc_init in file arch/arm/mach-tegra/board-ardbeg.c
One way of not having EMC dvfs is to return error from that function
pr_info(“emc dvfs table not present\n”);
return -EINVAL;

These two kernel command line configs are to be updated in /boot/extlinux/extlinux.conf file in target for u-boot bootloader.

Thats it. I think I have not missed anything:-)


Jetson-TK1-4GB-Kernel-Patch-and-4gbHynixBCT.7z (5.06 KB)


I am in charge of Tegra K1 Qseven module project for our company products.
I am considering it to use for media player of video switcher products.
Large DRAM(>6.5GBytes) and PCIe x4 Gen2 connection with FPGA are needed.

At first, I am trying to config 8GByte DRAM with below Micron DDR3L.

16x1Gb, twin die DDR3L, “MT41K1G16DGA-125”


Is it possible to configure 8GByte DRAM module with this parts?
I have seen in Jetson TK1 schematic, A15 & CS1# are connected between DDR3L and Tegra K1.

I already replaced the DRAMs on Jetson TK1 with above parts.
Without kernel modification, booting as 2GB is OK but it’s unstable.
During untar operation, mmu errors are on uart console, and system halt sometimes.
I guess that it’s due to clock mismatch between DRAM controller(933MHz) and DRAM(800MHz max).
It looks like overclocking DRAM.

Who can tell me that the above 8GByte configuration is possible or not?
And, if possible, please, guide me.
Anyway, I will try your patches for 4GByte config.

Seungoh Yi

Hi mupama,

We don’t provide support for >=4GB DRAM.

I have the MT41K512M16HA-125:A (4GB) working with our custom Tegra K1 board. So you do not have to have a twin die like Asong stated.

Additionally we have a 8GB (MT41K1G16DGA-125) Micron memory working as well on our TK1 board. It was not very difficult to get the memories working so the fact that NVIDIA does not support >=4GB DRAM is of little consequence.

Hi Bheflin,

we have not tried 8GB on TK1 in nvidia. Can you please share the change details for the benefit of other users?


Sorry I cannot support that request, per my manager.

Getting the memory working requires modification to the configuration file using the SHMOO program and then follow the directions for 4GB on this site: jetson_hw_hacking/4gb_dma_zone.patch at master · lgeek/jetson_hw_hacking · GitHub

Good Luck +O:–)

We are using 4GB Micron DDR MT41K512M16HA-107:A in our custom Tegra K1 board.
Is there any 924MHz cfg available for this part?

Jeslin Paul