Hi NVIDIA team,
I am currently working on a custom carrier board. We are using the following pins for the switch:
spi1_cs1_pk3soc_gpio128_pl4dap6_sclk_pp2dap6_din_pp4dap6_fs_pp5
Initially, we routed these pins through a TXB0108 level shifter with external 3.3V pull-ups for the buttons, but we observed an abnormal ~1V level. We suspect this is a hardware conflict between the TXB series and the external pull-up resistor for open-drain applications.
Before we modify our hardware design to bypass the level shifter, we want to verify the specific capabilities of these pins to ensure we are on the right track.
Question: Can all of these specific pins be safely configured and used as standard GPIO inputs for push buttons? Are there any hardware or pinmux restrictions we should be aware of?
Thanks!