Abnormal SYS_RESET* behavior in Jetson nano sometimes

Hi, Nvidia

We found abnormal SYS_RESET* behavior in Jetson nano, it’s an
occurrent behavior.

After VDD_IN (5V) is power on, POWER_EN is enable, SYS_RESET* is pull high by nano, however, after a few ms, It’s pulled low again, and then pulled high.

In our design, SYS_RESET* is the same as Develop kit, only connect to 5V-3.3V buck.

this is the waveform, could you help to check why will it happen?

Does it happen on dev kit or just on your custom board? If latter, please compare your design to reference schematic of dev kit to find out root cause.

In my carrier board.

I think your answer is NOT REASONABLE . Since Nvidia does not only support customer to use develop-kit only, but also support custom design based on design guide.

Since My carrier board is all follow the design guide in Power up sequence and even copy the whole circuit about Power up sequence control, but meet this abnormal behavior. And I do not think your develop-kit can verify your module design completely!

If your carrier board design is same to dev kit, then there will be no such problem since no on dev kit, do you agree? So, to compare your design to reference to find out difference is the only way, right?

I do not think so!

Your dev kit is using 5V input, does other custom have to use 5V? If you did not use, and meet some abnormal case, then nvidia do not have any responsible to clear it?

In you opinion, nvidia should tell custom, YOU SHOULD USE DEVELOP KIT ONLY, OTHERWISE, WE HAVE NO SUPPORT!

5V to module is must as said in guide. The design guide and dev kit schematic are for customer’s reference, of course we encourage and support customer to make custom design following guide. Regarding your problem, I already suggested you to compare first, otherwise how to locate this issue? The difference might not be on sys_reset design, it might be on other parts. So please compare and find out first.

Also, the sys_reset is a signal output from PMIC if no external control, so some power rails fail or pin status wrong might cause it, these all need to sync with reference design to eliminate the possible difference.

What I said 5V input or other is not module input, but board input, The only difference between our design and developkit is we add a 24V to 5V buck for 5V input, and 5V can be seen in waveform, there is no sudden loss when the SYS_RESET* pull low again, I DO compare the design before create a topic, Since I do not have any detail information of the PMIC on module , I do not know what will cause PMIC pull down the SYS_RESET except power sudden loss, So I need help from nvidia.

Never met such issue on sys_reset, can only suspect there is pin status error but not sure about which pin. There is a 260-pin table in design guide in which pins usage is listed, you can check your design based on that to see if any pin setting is different. Also is there any change on your software since it is “occurrent behavior”?

There is no update from you for a period, assuming this is not an issue any more.
Hence we are closing this topic. If need further support, please open a new one. Thanks

Hi liumiao,

Has issue be root cased?
Any further suggestions required?

NO, It had not found the root cause, however, I also cannot reproduce in develop kit.