About eDP


I am MINSOO JUNG in korea

I try to edp communication but don’t work.

I messured Aux signal using a oscilloscope and it’s ok

But, When i AUX register WRITE is not ok. [Time read out message]

and i wonder that this message

[ 3121.516596] tegradc tegradc.0: dp: channel equalization failed
[ 3121.526765] tegradc tegradc.0: dp: full lt failed.

this message


eDP LINE.png

eDP PIN.pptx (36.5 KB)

Hi Msoo,

Could you share how you connect your eDP to tk1? Any schematics?

Board on shematics

I don’t see the link or any images. Do you miss it?

No , i don’t miss it

you are Just click edp line.png

Oops, it is on the top comment. I see it.
Please wait for a while. We will help you check the design.


Hi Msoo,

It seems the connection mapping has something wrong. Could you please check the Tegra K1 Embedded Platform Design Guide? There is a section “eDP 4-lane connection”


Reply to me.

But, it’s a relative AUX Channel?

Hi Msoo,

Sorry I don’t quite understand what do you mean. Could you make it more clear?


I think that AUX channel is problem.

But i massured AUX channell wave it’s not problem.

so… how can way ?

Can you make sure all other connection is correct?