About the required value of the received signal of MIPI CSI D-PHY

We are designing a board that sends MIPI CSI signals to Jetson AGX Xavier via the camera expansion connector on ConnectTech’s Rogue/Rogue-X board.

Along with the layout,I want to perform waveform simulation of MIPI CSI D-PHY HS signal (1.6Gbps/lane).
Since only the IBIS model is available on the transceiver side, I would like to confirm the eye pattern by signal integrity analysis.

Q.1
I downloaded the IBIS model of Xavier from NVIDIA’s HP,
Can you tell me the required value or guideline on the receiver side when checking the signal quality with the following eye pattern?
・ Input threshold voltage range … ± ??? mV(minimum)
・ Bit width required for eye pattern opening… 0.?? Unit Interval(minimum)

Q.2
“Jetson_AGX_Xavier_Series_OEM_Product_Design_Guide_DG-09840-001_v2.5”
The required value of insertion loss is described in “Table 10-6. MIPI CSI D-PHY Interface Signal Routing Requirements” on page 87.

The higher the frequency, the smaller the absolute value of the insertion loss, Is this description correct?
We assume 1.6Gbps/lane, should we estimate it with an absolute value larger than 2.96 dB?

Hi, for Q1, please follow the spec of CSI D-PHY. For Q2, should be <2.96 dB as you can see in the guide.

Trumany-san,
Thank you for your reply.

Let me check Q2 just in case.

As a required value for insertion loss,
Less than 3.1bB for 1Gbps, less than 2.17dB for 2.5GBps.
Is this okay?

Yes , it has been listed in DG.

Trumany-san,
Thank you for your reply.

Sorry again

Normally, I think that the absolute value of insertion loss increases as the frequency increases.
For example, the SLVS value is listed on P92 of the same DG,
and the absolute value of insertion loss increases as the frequency increases.

The description of MIPI on P87 is such that the absolute value decreases as the frequency increases.
Is this description correct?

As far as I understand it, it’s not necssary for your device to cause all of 3.1 dB loss at 1 Gbps. Anything less is fine!

The requirement is only that if you want to run at 1 Gbps, your loss must be less than 3.1 dB, and if you want to run at 2.5 Gbps, your loss must be less than 2.17 dB. Yes, it’s harder to run faster, and you must design with less loss to achieve higher speed. This is of course hard, because with a given fixes design, the higher speed you run at, the more loss you will get, but that’s not the phenomenon this specification describes.

You could also turn the description around: If your loss is 3.1 dB or less at 1 Gbps, you can run at 1 Gbps, and if your loss is 2.17 dB or less at 2.5 Gbps, you can run at 2.5 Gbps.

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That is negative value for SLVS which is less with freq increasing.

Thank you for your reply.
I will think about it

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