About the startup behavior of the Jetson baseboard
I have a question about the startup behavior of my homemade Jetson Orin nano/NX baseboard.
I can’t start up the homemade board with the Jetson Orin nano attached.
When I look at the output of the debug port, the following message appears, and I keep restarting it.
…
W> Skip ratchet update - OPTIN fuse not set
I> Task: Prepare eeprom data (0x50018ac4)
E> I2C: slave not found in slaves.
E> I2C: Could not write 0 bytes to slave: 0x00ae with repeat start true.
E> I2C_DEV: Failed to send register address 0x00000000.
E> I2C_DEV: Could not read 256 registers of size 1 from slave 0xae at 0x00000000 via instance 0.
E> eeprom: Failed to read I2C slave device
C> Task 0x0 failed (err: 0x1f1e050d)
E> Top caller module: I2C_DEV, error module: I2C, reason: 0x0d, aux_info: 0x05
I> Busy Spin
Now repeat the reboot
The following is stated on page 27 of “Jetson Orin NX Series and Jetson Orin Nano Series Product Design Guide(DG-10931-001_v1.2).pdf”.
4.5 Features Not to Be Implemented
The reference design features that should not be copied as they are not required or useful for a custom carrier board design. The ID EEPROM (U17) is a feature that is used for NVIDIA internal purposes, but not recommended on a custom design. If a similar functionality is desired for a custom design, avoid using address 7’h57 on the I2C2 interface.
After reading this, I copied the circuit of “Carrier board config” on page 24 of “P3768_A04_OrCAD_schematics(base_version).pdf” and changed the address from 7’h57 to 7’h56 to add an EEPROM to my board.
Here are some questions:
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What is the Jetson module trying to do with the EEPROM in the debug port log?
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The debug port log says “slave: 0x00ae with …”, but does this EEPROM refer to the EEPROM on my board? Or is there another EEPROM inside the Jetson module?
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My board also has the M.2 KEY-M (NVME) [A] (1x X4PCIe) on page 21 of “P3768_A04_OrCAD_schematics(base_version).pdf”. I2C2_SCL and I2C2_SDA are directly connected to P42 (SMB_DATA) and p40 (SMB_CLK) of this PCIE (NVMe), and are connected in parallel with the EEPROM. Is this ok?
Thank you in advance.