Hello,
I am trying to use jetson xavier nx and PCM3010 audio codec together.
I downloaded the following Excel file from Jetson Download Center.
I would appreciate it if you could explain how to set it up with pictures
Thank you.
Hello,
I am trying to use jetson xavier nx and PCM3010 audio codec together.
I downloaded the following Excel file from Jetson Download Center.
I would appreciate it if you could explain how to set it up with pictures
Thank you.
hello Hodu,
please check developer guide, Pinmux Changes.
you must change the pinmux configuration applied by the software if your board schematic differs from that for Jetson Xavier NX DevKit,
there’s also a chapter, Configuring the 40-Pin Expansion Header.
you may enable the Jetson-IO tool to simplify the configuration.
thanks
Hello, @jonathanh
I would like to receive the same audio patch from nano for my own nx, can you provide it?
Or can you tell me again in order from modifying excel to building dtb?
Thank you.
hello Hodu,
you must change the pinmux configuration applied by the software,
please download the pinmux spreadsheets and customize it with your board’s configuration;
you should generate several dtsi files with the “Generate DT file” button on the top-right.
after that,
please copy those generated dtsi files and use the dts2cfg
tool, which converts pinmux, gpio and pad dts file to cfg format,
you may refer to the readme file as below,
for example, $OUT/JetPack_4.5.1/Linux_for_Tegra/kernel/pinmux/t19x/README.txt
once you have new *.cfg file, please perform a whole flash process to flash the JetPack release image,
thanks
Hello,
Can I only flash dtb like I did in nano?
Thank you.
Hello,
How do I edit what items in the excel file?
Can you show me as a screenshot?
Thank you.
hello Hodu,
you must perform a whole flash to update the board configuration file.
flash device tree blob it only update kernel-dtb.
Hello, @JerryChang @jonathanh
I have downloaded excel file for nx.
Can you tell me the part that needs to be modified in the excel file by way of a picture?
Here’s what @jonathanh told me when I was working on nano. Can you explain this?
Thank you.
hello Hodu,
please review your PCM3010 to understanding the pins for connection.
after that, please have board customization with pinmux spreadsheets.
it should be pins under AUDIO_HV for audio codecs, those pin by default as unused.
please toggle the options to have pin selection, generate dtsi files, then convert it as board configuration file to flash the board.
thanks
Hello,
There are already customized boards equipped with PCM3010.
When I look at the xavier pinmux spreadsheet as follows, it is difficult to find the content I want to change because the column is hidden.
Can you tell me how to edit the excel file?
Thank you.
Hello, @JerryChang @jonathanh
jetsonhostpc@jetsonhostpc-Vostro-470:~/coding/xavier_nx_flashing/Linux_for_Tegra/kernel/pinmux/t19x$ python3 pinmux-dts2cfg.py --pinmux addr_info.txt gpio_addr_info.txt por_val.txt --mandatory_pinmux_file mandatory_pinmux.txt tegra19x-jetson_xavier_nx_module-pinmux.dtsi tegra19x-jetson_xavier_nx_module-gpio-default.dtsi 1.0 > jetson.cfg
ERROR: pin dap3_sclk_pt1(0x00000440) field nvidia,enable-input(0x00000040) is not matching, val = 0x01 expected = 0x00
ERROR: pin dap3_fs_pt4(0x00000440) field nvidia,enable-input(0x00000040) is not matching, val = 0x01 expected = 0x00
ERROR: pin eqos_rd3_pf1(0x00022470) field nvidia,lpbk(0x00000020) is not matching, val = 0x01 expected = 0x00
ERROR: pin eqos_sma_mdio_pf4(0x00022440) field nvidia,pull(0x0000000c) is not matching, val = 0x00 expected = 0x02
ERROR: pin sdmmc4_cmd(0x00002440) field nvidia,pull(0x0000000c) is not matching, val = 0x00 expected = 0x02
ERROR: pin soc_gpio10_pg6(0x00000410) field nvidia,tristate(0x00000010) is not matching, val = 0x01 expected = 0x00
ERROR: pin gp_pwm2_px2(0x00000410) field nvidia,tristate(0x00000010) is not matching, val = 0x01 expected = 0x00
ERROR: pin uart2_tx_px4(0x00000400) field nvidia,pull(0x0000000c) is not matching, val = 0x00 expected = 0x02
ERROR: pin uart2_rx_px5(0x00000450) field nvidia,pull(0x0000000c) is not matching, val = 0x00 expected = 0x02
ERROR: pin can0_dout_paa2(0x0000c400) field nvidia,pull(0x0000000c) is not matching, val = 0x00 expected = 0x02
ERROR: pin can0_din_paa3(0x0000c450) field nvidia,pull(0x0000000c) is not matching, val = 0x00 expected = 0x02
ERROR: pin uart3_tx_pcc5(0x00000400) field nvidia,pull(0x0000000c) is not matching, val = 0x00 expected = 0x02
ERROR: pin uart3_rx_pcc6(0x00000450) field nvidia,pull(0x0000000c) is not matching, val = 0x00 expected = 0x02
ERROR: pin soc_gpio22_pq2(0x00000459) field nvidia,pull(0x0000000c) is not matching, val = 0x02 expected = 0x00
ERROR: pin uart1_tx_pr2(0x00000400) field nvidia,pull(0x0000000c) is not matching, val = 0x00 expected = 0x02
ERROR: pin uart1_rx_pr3(0x00000454) field nvidia,pull(0x0000000c) is not matching, val = 0x01 expected = 0x02
What am I supposed to do?
I randomly named it jetson.cfg
Do you have a fixed name?
And where should the .cfg file be located?
Thank you.
hello Hodu,
please check the readme file as below to use the tool converts pinmux, gpio and pad dts file to cfg format
i.e. $OUT/Linux_for_Tegra/kernel/pinmux/t19x/README.txt
you may ignore those errors, and using the updated cfg file to flash the board.
please update the pinmux configuration file, by default is located at $OUT/Linux_for_Tegra/bootloader/t186ref/BCT/tegra19x-mb1-pinmux-p3668-a01.cfg
then, please perform a whole flash process to flash the JetPack release image,
thanks
Hello, @JerryChang
Is it a non-critical error?
What are the possible side effects of ignoring this error?
In sum, can you tell me why I can ignore it?
Does the file name of the .cfg file have any name?
Thank you.
hello Hodu,
it’s mismatch error as you can see from the messages.
please have a try to exclude --mandatory_pinmux_file mandatory_pinmux.txt
for example,
$ python pinmux-dts2cfg.py --pinmux addr_info.txt gpio_addr_info.txt por_val.txt tegra19x-jetson_xavier_nx_module-pinmux.dtsi tegra19x-jetson_xavier_nx_module-gpio-default.dtsi 1.0 > tegra19x-mb1-pinmux-p3668-a01.cfg