I am trying to have the memory controller run mode register read commands to the external LPDDR5 memory for a Jetson AGX Orin board I am using.
The Linux driver for an earlier Tegra version shows some of these registers being directly read:
emc_read_lpddr_mode_register(emc, emem_dev, 5, &emc->manufacturer_id);
emc_read_lpddr_mode_register(emc, emem_dev, 6, &emc->revision_id1);
emc_read_lpddr_mode_register(emc, emem_dev, 7, &emc->revision_id2);
emc_read_lpddr_mode_register(emc, emem_dev, 8, &emc->basic_conf4.value);
However, more recent tegra driver doesn’t show similar “emc” bindings:
Does the Jetson AGX Orin board include an external memory controller similar to previous Nvidia products?
Question 1a: If the answer to Q1 is no, what controller plays the role of running mode register read commands to the DRAM external memory device?
Question 2: What documentation describes the software APIs to this emc?
Given that SoC development boards often offer this capability, I have also downloaded several board support package software tools for this board, and have looked for tools to run mode register read commands at boot time, but did not find any.
Question 3: Do any tools supported by Nvidia allow running DRAM mode register read commands at boot time?
Thank you in advance