我用Jetson AGX Orin™ Developer Kit调试SPI1接口。配置步骤如下
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jetson-io配置spi的pinmux，配置完之后用busybox devmem验证
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修改SPI频率
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用echo “12312435443523412“ | spi-pipe -d /dev/spidev0.0 命令行验证输出，示波器抓取波形验证不符合预期
请帮忙分析原因~谢谢~
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The provided text appears to be a series of fragmented and repetitive sections from a documentation or manual related to NVIDIA Jetson modules, specifically the Jetson AGX Orin series. I’ll attempt to synthesize the information and provide a comprehensive answer.
Context
The text mentions various topics related to Jetson modules, including:
- Communications (PCIe Endpoint Mode, Enabling Bluetooth Audio, Audio Setup and Development)
- Clocks
- Platform Power and Performance (Jetson Orin Nano Series, Jetson Orin NX Series, and Jetson AGX Orin Series)
- Software Packages and the Update Mechanism
- Boot Time Optimization
- Working With Sources
- Test Plan and Validation
Hardware References
The text mentions several hardware-related topics, including:
- Jetson Developer Kit Setup
- Jetson EEPROM Layout
- Jetson Module Adaptation and Bring-Up (Jetson AGX Orin Series, Jetson Orin NX and Nano Series, Checklists)
- Configuring the Jetson Expansion Headers
- Controller Area Network (CAN)
Applications and Tools
The text mentions various applications and tools, including:
- Board Automation
- Jetson Linux Toolchain
- Jetson Linux Development Tools (Debugging on Jetson Platforms, Program Trace Macrocell, Tegrastats Utility, Tegra Combined UART)
- How to Submit a Bug Report
Reference Material
The text mentions several reference materials, including:
- Package Manifest
- Related Documentation
- Legal Information
Specific Question
The specific question appears to be related to the Jetson AGX Orin Developer Kit and SPI1 configuration. The text mentions:
jetsoniospipinmuxbusybox devmem image 592226 237 KB SPI image 892183 475 KB echo 12312435443523412 spipipe d devspidev00 6490d8aff9e8232386341d70485e86b2 17071280 224 KB
This text seems to be a command-line output or a configuration snippet related to SPI1 configuration on the Jetson AGX Orin Developer Kit. However, without more context, it’s difficult to provide a specific answer.
Comparison
There is no explicit comparison in the provided text. However, based on the context, it appears that the text is comparing different Jetson modules (Jetson AGX Orin, Jetson Orin NX, and Jetson Orin Nano) and their respective configurations.
Conclusion
In conclusion, the provided text is a collection of fragmented and repetitive sections from a documentation or manual related to NVIDIA Jetson modules. The specific question appears to be related to the Jetson AGX Orin Developer Kit and SPI1 configuration. However, without more context, it’s difficult to provide a specific answer. If you could provide more context or clarify the question, I’d be happy to try and assist further.
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Hi chutianwei,
What’s the Jetpack version in use?
How do you modify the SPI frequency?
Would it work if you don’t modify it?
From the image you shared, it seems you are connecting SPI to a EtherCAT board. Is it your SPI device to communicating with?
Please simply short MISO and MOSI before running the following command to verify the SPI loopback test.
$ sudo ./spidev_test -D /dev/spidev0.0 -v -p "HelloWorld123456789abcdef"
运行spidev_test之后，频率自动就会变成这个数值。我现在是短接MISO和MOSI的，发现短接运行spidev RX的数据和TX是一致的，但是如果我用示波器尝试去量MISO的波形，RX值就会异常。
我用的JP版本：Linux version 5.15.148-tegra (buildbrain@mobile-u64-6262-d8000) (aarch64-buildroot-linux-gnu-gcc.br_real (Buildroot 2022.08) 11.3.0, GNU ld (GNU Binutils) 2.38) #1 SMP PREEMPT Mon Jun 16 08:24:48 PDT 2025
是的，我想将agx orin驱动一个Ecat slave设备
500k is the default SPI frequency specified by spidev_test tool, your can also add -s option to specify the max speed.
It seems you can receive the data you sent as expected.
Please check with your HW engineer to debug. It looks like your scope affect the signal of SPI transaction.
hello
能帮忙用一样的方法测试一下您手里的硬件的情况吗？目前我已交换了两块开发板测试都是这种情况，SPI_CLK信号用示波器量如上图所示，波形很糟糕。
我手里的示波器测量：晶振频率等其他信号都是没问题的。
What do you mean about “terrible”?
Do you get unexpected SPI_CLK signal even in the SPI loopback test when you can receive expected data?
If so, please share the waveform for further check.
Could you share the front side of your oscilloscope to check the detail of your signal?
Please check the AGX Orin carrier board schematics in Jetson AGX Orin Developer Kit Carrier Board Design Files (A05) Log in | NVIDIA Developer . The 40 pin header signals are level shifted by a CMOS level shifter.
Also refer to Jetson Nano Developer Kit 40-Pin Expansion Header GPIO Usage Considerations Applications Note Log in | NVIDIA Developer which also applies here for level shifted signals on the 40 pin header. External buffers might be needed.
hello 我当前环境在TXB端没有加入任何负载，只接了示波器测量，需要加buffer驱动是不是不太合理？
有没有可能是前端SPI pin的驱动能力不足？
Depends on the capacitive loading presented by the oscilloscope probe.