AGX orin support or not embedded metadata?

hi:
I want to confirm whether the AGX orin platform can support embedded metadata?

Hi,
Do you mean reading embedded metadata from a Bayer sensor or YUV sensor?

hi:
Do you mean reading embedded metadata from a Bayer sensor or YUV sensor? -----> bayer sensor

Please reference to below API for it.

https://docs.nvidia.com/jetson/l4t-multimedia/classArgus_1_1Ext_1_1ISensorPrivateMetadata.html#ad5d098a7f14f18794ec53d3594d452a3

hi:
I think you misunderstood, I mean whether the current platform supports this embedded feature

Yes, the TX2/Xaiver/Orin serials both support embedded data.

Thanks

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hi:
Yes, the TX2/Xaiver/Orin serials both support embedded data.------》
I want to know whether the top and bottom are supported embedded data,thanks。

Suppose top without problem. However the bottom should be working but didn’t verified.

Thanks

hi:
now the sensor output top two lines,bottom four lanes, and raw12
i config the embedded_metadata_height = “6”;
active_w = “3840”;
active_h = “2160”;
but preview black screen, upload the trace log,
ar0820-embd.rar (4.3 MB)

The log tell packet header muti bit ecc error for DPHY

kworker/0:1-15      [000] ....   273.361605: rtcpu_nvcsi_intr: tstamp:9412107885 class:CORRECTABLE_ERR type:STREAM_NOVC phy:0 cil:0 st:0 vc:0 status:0x00000001
     kworker/0:1-15      [000] ....   273.361606: rtcpu_nvcsi_intr: tstamp:9412108449 class:GLOBAL type:STREAM_NOVC phy:0 cil:0 st:0 vc:0 status:0x00000001
     

hi:
modify the serder,upload the log
ar0820-embd-1.log (805.9 KB)

CSIMUX_FRAME bit 5 and 7 indicate lose the FE package cause the FS_FAULT

hi:
i upload the new log,
kworker/8:2-137 [008] … 60.106626: rtcpu_nvcsi_intr: tstamp:2747681638 class:GLOBAL type:PHY_INTR0 phy:0 cil:1 st:0 vc:0
status:0x00000008
kworker/8:2-137 [008] … 60.106627: rtcpu_nvcsi_intr: tstamp:2747682131 class:GLOBAL type:PHY_INTR0 phy:0 cil:0 st:0 vc:0
status:0x00000009
ar0820-embd-3.rar (3.6 MB)

It’s tell the data lane cil clock lane control error.
Please check the REG NVCSI_PHY_0_CILA_INTR_0_STATUS_CILA_0 in TRM for the information.

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