AGX orin uartd not worker

Yanhou.LI · February 20, 2024, 3:12am

I’m using JetPack 5.1.2,
use uart4 connections to UM482

We already connect R1600 and R1601

Have been deleted GPIO H3 and GPIO H4 by AGX-ORIN uart4 cannot work - #5 by KevinFFF

And UART1_RX_UM482 connect to uarte is ok

KevinFFF · February 20, 2024, 6:55am

Hi Yanhou.LI,

Are you using the devkit or custom board for AGX Orin?

From the result of /sys/kernel/debug/gpio, it seems PH.06 is still used by camera.
Please remove the usage for camera if you want to use it as CTS for uartd.

I would suggest you configure the pinmux for those pins for uartd first.
And check the device to enable the node.
At last, please check the dmesg during boot up.

Yanhou.LI · February 21, 2024, 3:08am

I do not use CTS.

There is also no error message from dmesg

dmesg.log (61.2 KB)

Yanhou.LI · February 22, 2024, 2:05am

I removed the GPIO H6 footprint.

I changed pinmux a little bit. The RTS and CTS were removed

diff --git a/bootloader/t186ref/BCT/tegra234-mb1-bct-pinmux-p3701-0000-a04.dtsi b/bootloader/t186ref/BCT/tegra234-mb1-bct-pinmux-p3701-0000-a04.dtsi
index 003c682..e63a38d 100644
--- a/bootloader/t186ref/BCT/tegra234-mb1-bct-pinmux-p3701-0000-a04.dtsi
+++ b/bootloader/t186ref/BCT/tegra234-mb1-bct-pinmux-p3701-0000-a04.dtsi
@@ -192,17 +192,15 @@
                                nvidia,pull = <TEGRA_PIN_PULL_NONE>;
                                nvidia,tristate = <TEGRA_PIN_DISABLE>;
                                nvidia,enable-input = <TEGRA_PIN_DISABLE>;
-                               nvidia,io-high-voltage = <TEGRA_PIN_DISABLE>;
                                nvidia,lpdr = <TEGRA_PIN_DISABLE>;
                        };
 
                        uart2_rx_px5 {
                                nvidia,pins = "uart2_rx_px5";
                                nvidia,function = "uartb";
-                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,pull = <TEGRA_PIN_PULL_UP>;
                                nvidia,tristate = <TEGRA_PIN_ENABLE>;
                                nvidia,enable-input = <TEGRA_PIN_ENABLE>;
-                               nvidia,io-high-voltage = <TEGRA_PIN_DISABLE>;
                                nvidia,lpdr = <TEGRA_PIN_DISABLE>;
                        };
 
@@ -226,7 +224,7 @@
 
                        uart5_tx_py5 {
                                nvidia,pins = "uart5_tx_py5";
-                               nvidia,function = "uarti";
+                               nvidia,function = "uarte";
                                nvidia,pull = <TEGRA_PIN_PULL_NONE>;
                                nvidia,tristate = <TEGRA_PIN_DISABLE>;
                                nvidia,enable-input = <TEGRA_PIN_DISABLE>;
@@ -235,8 +233,8 @@
 
                        uart5_rx_py6 {
                                nvidia,pins = "uart5_rx_py6";
-                               nvidia,function = "uarti";
-                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,function = "uarte";
+                               nvidia,pull = <TEGRA_PIN_PULL_UP>;
                                nvidia,tristate = <TEGRA_PIN_ENABLE>;
                                nvidia,enable-input = <TEGRA_PIN_ENABLE>;
                                nvidia,lpdr = <TEGRA_PIN_DISABLE>;
@@ -490,6 +488,24 @@
                                nvidia,lpdr = <TEGRA_PIN_DISABLE>;
                        };
 
+                       uart4_tx_ph3 {
+                               nvidia,pins = "uart4_tx_ph3";
+                               nvidia,function = "uartd";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                               nvidia,lpdr = <TEGRA_PIN_DISABLE>;
+                       };
+
+                       uart4_rx_ph4 {
+                               nvidia,pins = "uart4_rx_ph4";
+                               nvidia,function = "uartd";
+                               nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_ENABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                               nvidia,lpdr = <TEGRA_PIN_DISABLE>;
+                       };
+
                        gen1_i2c_scl_pi3 {
                                nvidia,pins = "gen1_i2c_scl_pi3";
                                nvidia,function = "i2c1";
@@ -1320,42 +1336,6 @@
                                nvidia,lpdr = <TEGRA_PIN_DISABLE>;
                        };
 
-                       uart4_tx_ph3 {
-                               nvidia,pins = "uart4_tx_ph3";
-                               nvidia,function = "rsvd2";
-                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
-                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
-                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
-                               nvidia,lpdr = <TEGRA_PIN_DISABLE>;
-                       };
-
-                       uart4_rx_ph4 {
-                               nvidia,pins = "uart4_rx_ph4";
-                               nvidia,function = "rsvd1";
-                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
-                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
-                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
-                               nvidia,lpdr = <TEGRA_PIN_DISABLE>;
-                       };
-
-                       uart4_rts_ph5 {
-                               nvidia,pins = "uart4_rts_ph5";
-                               nvidia,function = "rsvd2";
-                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
-                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
-                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
-                               nvidia,lpdr = <TEGRA_PIN_DISABLE>;
-                       };
-
-                       uart4_cts_ph6 {
-                               nvidia,pins = "uart4_cts_ph6";
-                               nvidia,function = "rsvd1";
-                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
-                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
-                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
-                               nvidia,lpdr = <TEGRA_PIN_DISABLE>;
-                       };
-
                        soc_gpio41_ph7 {
                                nvidia,pins = "soc_gpio41_ph7";
                                nvidia,function = "rsvd2";
@@ -1800,6 +1780,24 @@
                                nvidia,lpdr = <TEGRA_PIN_DISABLE>;
                        };
 
+                       uart4_rts_ph5 {
+                               nvidia,pins = "uart4_rts_ph5";
+                               nvidia,function = "rsvd2";
+                               nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+                               nvidia,tristate = <TEGRA_PIN_ENABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                               nvidia,lpdr = <TEGRA_PIN_DISABLE>;
+                       };
+
+                       uart4_cts_ph6 {
+                               nvidia,pins = "uart4_cts_ph6";
+                               nvidia,function = "rsvd1";
+                               nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+                               nvidia,tristate = <TEGRA_PIN_ENABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                               nvidia,lpdr = <TEGRA_PIN_DISABLE>;
+                       };
+
                        qspi1_sck_pc6 {
                                nvidia,pins = "qspi1_sck_pc6";
                                nvidia,function = "rsvd1";
diff --git a/bootloader/tegra234-mb1-bct-gpio-p3701-0000.dtsi b/bootloader/tegra234-mb1-bct-gpio-p3701-0000.dtsi
index e171561..06d798c 100644
--- a/bootloader/tegra234-mb1-bct-gpio-p3701-0000.dtsi
+++ b/bootloader/tegra234-mb1-bct-gpio-p3701-0000.dtsi
@@ -61,7 +61,6 @@
                                TEGRA234_MAIN_GPIO(G, 4)
                                TEGRA234_MAIN_GPIO(G, 7)
                                TEGRA234_MAIN_GPIO(H, 0)
-                               TEGRA234_MAIN_GPIO(H, 5)
                                TEGRA234_MAIN_GPIO(H, 7)
                                TEGRA234_MAIN_GPIO(I, 0)
                                TEGRA234_MAIN_GPIO(I, 1)
@@ -90,9 +89,6 @@
                                TEGRA234_MAIN_GPIO(Z, 2)
                                TEGRA234_MAIN_GPIO(N, 3)
                                TEGRA234_MAIN_GPIO(H, 1)
-                               TEGRA234_MAIN_GPIO(H, 3)
-                               TEGRA234_MAIN_GPIO(H, 4)
-                               TEGRA234_MAIN_GPIO(H, 6)
                                TEGRA234_MAIN_GPIO(I, 5)
                                TEGRA234_MAIN_GPIO(AC, 0)
                                TEGRA234_MAIN_GPIO(AC, 1)
@@ -106,7 +102,6 @@
                                TEGRA234_MAIN_GPIO(Y, 2)
                                TEGRA234_MAIN_GPIO(Y, 4)
                                TEGRA234_MAIN_GPIO(Z, 0)
-                               TEGRA234_MAIN_GPIO(Q, 1)
                                TEGRA234_MAIN_GPIO(G, 3)
                                TEGRA234_MAIN_GPIO(AC, 7)
                                TEGRA234_MAIN_GPIO(K, 4)

It is normal that the resistor 1601 can be decoded with an oscilloscope

Reading data with picocom stuck

KevinFFF · February 22, 2024, 10:44am

Could you short UART4_TX and UART4_RX and run the following command to verify loopback test?

$ sudo su
# stty -F /dev/ttyTHS3 115200 raw -echo
# cat /dev/ttyTHS3 &
# echo "test" > /dev/ttyTHS3

Yanhou.LI · February 22, 2024, 11:24am

no data

Yanhou.LI · February 23, 2024, 4:07am

I find that the voltage of UART4_TX is not pulled up.
Also, I used export PH03 and PH04 as gpio , and exporting data is OK.
How can I be sure that the ports PH3 and PH4 are connected to the uartd

KevinFFF · February 23, 2024, 4:15am

Please use pinmux spreadsheet as following to configure those pins for uartd usage.

Yanhou.LI · February 23, 2024, 6:09am

pinmux config
Before

After

generate DT file different only at uart4_rx_ph4 pull?

Is the generated DT file correct？

KevinFFF · February 23, 2024, 6:30am

I think the previous pinmux should also works for uartd.

pinmux means you could use the pin either for UART or GPIO usage.
The default pinmux seems has been configured for uartd already.

Yanhou.LI · February 23, 2024, 6:50am

uart4 default used to GPIO

and

Please use pinmux spreadsheet as following to configure those pins for uartd usage.

image2667×45 5.86 KB

Drive 1 not in effect in the UART case

I’m thinking of the UART4_TX pin. Measure why it’s not being pulled up

KevinFFF · February 23, 2024, 9:10am

Please just configure them as UD3_TXD/UD3_RXD.

Yes, that is just the initial state configured in MB1 and UART driver would control them after boot up.

Could your uartd work after configure and apply the pinmux change?

system · March 12, 2024, 7:38am

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AGX orin uartd not worker

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