AGX ORIN uses Jetpack6.0, UART2 sending and receiving anomalies

When our self-developed carrier board uses Jetpack5.1.1 version, all interfaces function normally. Now we want to upgrade to Jetpack6.0, but in the test process, we found that UART2 is abnormal. The following image:

In the following figure, /dev/ttyTHS0 is the device name for UART1, and /dev/ttyS2 is the device name for UART2.


The test flow is to short the TX and RX pins of UART1 and UART2, respectively. Conduct UART loop test.

In the test, UART2 appears garbled code.

The modification of the pinmux table is as follows:

How to check?

Hi chen.xi,

Have you configured the pinmux for these UART interface in JP6.0 DP?

Could you reproduce the same issue on the devkit?

Please also share the full device tree for further check.

Unable to upload the dts file, I compressed it to a compressed package.
device-tree.zip (52.1 KB)

On devkit, UART2 is bootstrapped on Debug MCU. It doesn’t seem to be in the form of a pin or an interface.

I obtained the register addresses of UART2_TX and UART2_RX on different L4T versions of the same hardware
In both the L4T35.3.1 and L4T36.2 versions, the values are the same.

root@tegra-ubuntu:/home/nvidia# busybox devmem 0x0243d070
0x00000400
root@tegra-ubuntu:/home/nvidia# busybox devmem 0x0243d078
0x00000450

Just to reiterate: Regarding UART2, the following changes are made in the device tree:

                serial@3140000 {
                        status = "okay";
                };

The modified content in pinmux is as follows:

                        uart5_tx_py5 {
                                nvidia,pins = "uart5_tx_py5";
                                //nvidia,function = "uarti";
                                nvidia,function = "uarte";
                                nvidia,pull = <TEGRA_PIN_PULL_NONE>;
                                nvidia,tristate = <TEGRA_PIN_DISABLE>;
                                nvidia,enable-input = <TEGRA_PIN_DISABLE>;
                                nvidia,lpdr = <TEGRA_PIN_DISABLE>;
                        };

                        uart5_rx_py6 {
                                nvidia,pins = "uart5_rx_py6";
                                //nvidia,function = "uarti";
                                nvidia,function = "uarte";
                                nvidia,pull = <TEGRA_PIN_PULL_NONE>;
                                nvidia,tristate = <TEGRA_PIN_ENABLE>;
                                nvidia,enable-input = <TEGRA_PIN_ENABLE>;
                                nvidia,lpdr = <TEGRA_PIN_DISABLE>;
                        };

Can you also share cat /proc/cmdline on your board?

and modify the following line to use Tegra High Speed Uart driver instead.

		serial@3140000 {
			clock-names = "serial";
			resets = <0x03 0x68>;
			interrupts = <0x00 0x74 0x04>;
			clocks = <0x03 0x9f>;
-			compatible = "nvidia,tegra234-uart\0nvidia,tegra20-uart";
+			compatible = "nvidia,tegra194-hsuart";
			status = "okay";
			reg = <0x00 0x3140000 0x00 0x10000>;
			reset-names = "serial";
		};

Is you current issue about UART2(PY.05, PY.06) output unexpected messages?

Seems to be compatible problem, after the modification, now has no problem.

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