AGX xavier mipi csi 2 from FPGA without I2C Help

Hi Nvidia Developers,

I have a custom carrier PCB for the AGX Xavier Industrial SOM module, which features a Xilinx FPGA. My task is to program the Xilinx FPGA to generate a custom image resembling a green screen. Once created, this image is transmitted via MIPI CSI-2 to the AGX Xavier. It’s crucial that the AGX Xavier Industrial SOM operates without the need for I2C. I have completed the FPGA programming task successfully. Here are the MIPI signals, captured using a 1GHz oscilloscope: they utilize a 2-lane configuration, with a lane speed of 912 Mbps. The CSI output format from the FPGA is RGB888.

Yellow line is clock,

Red line is data

After completing the FPGA section, I’m now focusing on the AGX Xavier aspect. While browsing through forums, I came across numerous topics related to this task, but unfortunately, I couldn’t find much information specifically tailored to the AGX Xavier Industrial model. Regarding my Linux configuration, I opted not to use JetPack; instead, I utilized Linux for Tegra (Jetson Linux) version R35.4.1 (Jetson Linux 35.4.1 | NVIDIA Developer). I flashed the image onto the AGX Xavier using ./flash.sh.

Steps for the Xavier side of the task:

Utilized CSI2 with a 2-lane option, connecting my FPGA pins to these MIPI pins.

1-) edit tegra194-camera-e3326-a00.dtsi

/ {
	host1x {
		status = "okay";
		vi@15c10000 {
			num-channels = <1>;
			status = "okay";
			ports {
				#address-cells = <1>;
				#size-cells = <0>;
				port@0 {
					status = "okay";
					reg = <0>;
					e3326_vi_in0: endpoint {
						status = "okay";
						port-index = <2>;
						bus-width = <2>;
						remote-endpoint = <&e3326_csi_out0>;
					};
				};
			};
		};

		nvcsi@15a00000 {
			num-channels = <1>;
			#address-cells = <1>;
			#size-cells = <0>;
            		status = "okay";
			channel@0 {
				status = "okay";
				reg = <0>;
				ports {
					status = "okay";
					#address-cells = <1>;
					#size-cells = <0>;
					port@0 {
						status = "okay";
						reg = <0>;
						e3326_csi_in0: endpoint@0 {
							status = "okay";
							port-index = <2>;
							bus-width = <2>;
							remote-endpoint = <&e3326_ov5693_out0>;
						};
					};
					port@1 {
						status = "okay";
						reg = <1>;
						e3326_csi_out0: endpoint@1 {
							status = "okay";
							remote-endpoint = <&e3326_vi_in0>;
						};
					};
				};
			};
		};
	};

	i2c@3180000 {
		status = "okay";
		ov5693_c@36 {
			status = "okay";
			compatible = "nvidia,ov5693";
			/* I2C device address */
			reg = <0x36>;

			/* V4L2 device node location */
			devnode = "video0";

			/* Physical dimensions of sensor */
			physical_w = "3.674";
			physical_h = "2.738";

			/* Define any required hw resources needed by driver */
			/* ie. clocks, io pins, power sources */
			avdd-reg = "vana";
			iovdd-reg = "vif";

			/* Sensor output flip settings */
			vertical-flip = "true";

			/**
			* A modeX node is required to support v4l2 driver
			* implementation with NVIDIA camera software stack
			*
			* mclk_khz = "";
			* Standard MIPI driving clock, typically 24MHz
			*
			* num_lanes = "";
			* Number of lane channels sensor is programmed to output
			*
			* tegra_sinterface = "";
			* The base tegra serial interface lanes are connected to
			* Incase of virtual HW devices, use virtual
			* For SW emulated devices, use host
			*
			* phy_mode = "";
			* PHY mode used by the MIPI lanes for this device
			*
			* discontinuous_clk = "";
			* The sensor is programmed to use a discontinuous clock on MIPI lanes
			*
			* dpcm_enable = "true";
			* The sensor is programmed to use a DPCM modes
			*
			* cil_settletime = "";
			* MIPI lane settle time value.
			* A "0" value attempts to autocalibrate based on mclk_multiplier
			*
			*
			*
			*
			* active_w = "";
			* Pixel active region width
			*
			* active_h = "";
			* Pixel active region height
			*
			* pixel_t = "";
			* The sensor readout pixel pattern
			*
			* readout_orientation = "0";
			* Based on camera module orientation.
			* Only change readout_orientation if you specifically
			* Program a different readout order for this mode
			*
			* line_length = "";
			* Pixel line length (width) for sensor mode.
			* This is used to calibrate features in our camera stack.
			*
			* mclk_multiplier = "";
			* Multiplier to MCLK to help time hardware capture sequence
			* TODO: Assign to PLL_Multiplier as well until fixed in core
			*
			* pix_clk_hz = "";
			* Sensor pixel clock used for calculations like exposure and framerate
			*
			*
			*
			*
			* inherent_gain = "";
			* Gain obtained inherently from mode (ie. pixel binning)
			*
			* == Source Control Settings ==
			*
			* Gain factor used to convert fixed point integer to float
			* Gain range [min_gain/gain_factor, max_gain/gain_factor]
			* Gain step [step_gain/gain_factor is the smallest step that can be configured]
			* Default gain [Default gain to be initialized for the control.
			*     use min_gain_val as default for optimal results]
			* Framerate factor used to convert fixed point integer to float
			* Framerate range [min_framerate/framerate_factor, max_framerate/framerate_factor]
			* Framerate step [step_framerate/framerate_factor is the smallest step that can be configured]
			* Default Framerate [Default framerate to be initialized for the control.
			*     use max_framerate to get required performance]
			* Exposure factor used to convert fixed point integer to float
			* For convenience use 1 sec = 1000000us as conversion factor
			* Exposure range [min_exp_time/exposure_factor, max_exp_time/exposure_factor]
			* Exposure step [step_exp_time/exposure_factor is the smallest step that can be configured]
			* Default Exposure Time [Default exposure to be initialized for the control.
			*     Set default exposure based on the default_framerate for optimal exposure settings]
			*
			* gain_factor = ""; (integer factor used for floating to fixed point conversion)
			* min_gain_val = ""; (ceil to integer)
			* max_gain_val = ""; (ceil to integer)
			* step_gain_val = ""; (ceil to integer)
			* default_gain = ""; (ceil to integer)
			* Gain limits for mode
			*
			* exposure_factor = ""; (integer factor used for floating to fixed point conversion)
			* min_exp_time = ""; (ceil to integer)
			* max_exp_time = ""; (ceil to integer)
			* step_exp_time = ""; (ceil to integer)
			* default_exp_time = ""; (ceil to integer)
			* Exposure Time limits for mode (us)
			*
			*
			* min_hdr_ratio = "";
			* max_hdr_ratio = "";
			* HDR Ratio limits for mode
			*
			* framerate_factor = ""; (integer factor used for floating to fixed point conversion)
			* min_framerate = "";
			* max_framerate = "";
			* step_framerate = ""; (ceil to integer)
			* default_framerate = ""; (ceil to integer)
			* Framerate limits for mode (fps)
			*/
			mode0 { // OV5693_MODE_2592X1944
				status = "okay";
				mclk_khz = "24000";
				num_lanes = "2";
				tegra_sinterface = "serial_c";
				phy_mode = "DPHY";
				discontinuous_clk = "yes";
				dpcm_enable = "false";
				cil_settletime = "0";

				active_w = "1280";
				active_h = "720";
				mode_type = "rgb";
				pixel_phase = "rgb888";
				csi_pixel_bit_depth = "24";
				readout_orientation = "0";
				line_length = "1280";
				inherent_gain = "1";
				mclk_multiplier = "2.375";
				pix_clk_hz = "57000000";

				gain_factor = "10";
				min_gain_val = "10";/* 1DB*/
				max_gain_val = "160";/* 16DB*/
				step_gain_val = "1";
				default_gain = "10";
				min_hdr_ratio = "1";
				max_hdr_ratio = "1";
				framerate_factor = "1000000";
				min_framerate = "1816577";/*1.816577 */
				max_framerate = "200000000";/*30*/
				step_framerate = "1";
				default_framerate = "60000000";
				exposure_factor = "1000000";
				min_exp_time = "34";/* us */
				max_exp_time = "550385";/* us */
				step_exp_time = "1";
				default_exp_time = "33334";/* us */
				embedded_metadata_height = "0";
			};

//			mode1 { //OV5693_MODE_2592X1458
//				mclk_khz = "24000";
//				num_lanes = "2";
//				tegra_sinterface = "serial_c";
//				phy_mode = "DPHY";
//				discontinuous_clk = "yes";
//				dpcm_enable = "false";
//				cil_settletime = "0";
//
//				active_w = "2592";
//				active_h = "1458";
//				mode_type = "bayer";
//				pixel_phase = "bggr";
//				csi_pixel_bit_depth = "10";
//				readout_orientation = "0";
//				line_length = "2688";
//				inherent_gain = "1";
//				mclk_multiplier = "6.67";
//				pix_clk_hz = "160000000";
//
//				gain_factor = "10";
//				min_gain_val = "10";/* 1DB*/
//				max_gain_val = "160";/* 16DB*/
//				step_gain_val = "1";
//				default_gain = "10";
//				min_hdr_ratio = "1";
//				max_hdr_ratio = "1";
//				framerate_factor = "1000000";
//				min_framerate = "1816577";/*1.816577 */
//				max_framerate = "30000000";/*30*/
//				step_framerate = "1";
//				default_framerate = "30000000";
//				exposure_factor = "1000000";
//				min_exp_time = "34";/* us */
//				max_exp_time = "550385";/* us */
//				step_exp_time = "1";
//				default_exp_time = "33334";/* us */
//				embedded_metadata_height = "0";
//			};
//
//			mode2 { //OV5693_MODE_1280X720
//				mclk_khz = "24000";
//				num_lanes = "2";
//				tegra_sinterface = "serial_c";
//				phy_mode = "DPHY";
//				discontinuous_clk = "yes";
//				dpcm_enable = "false";
//				cil_settletime = "0";
//
//				active_w = "1280";
//				active_h = "720";
//				mode_type = "bayer";
//				pixel_phase = "bggr";
//				csi_pixel_bit_depth = "10";
//				readout_orientation = "0";
//				line_length = "1752";
//				inherent_gain = "1";
//				mclk_multiplier = "6.67";
//				pix_clk_hz = "160000000";
//
//				gain_factor = "10";
//				min_gain_val = "10";/* 1DB*/
//				max_gain_val = "160";/* 16DB*/
//				step_gain_val = "1";
//				default_gain = "10";
//				min_hdr_ratio = "1";
//				max_hdr_ratio = "1";
//				framerate_factor = "1000000";
//				min_framerate = "2787078";/* 2.787078 */
//				max_framerate = "120000000";/* 120*/
//				step_framerate = "1";
//				default_framerate = "120000000";
//				exposure_factor = "1000000";
//				min_exp_time = "22";/* us */
//				max_exp_time = "358733";/* us */
//				step_exp_time = "1";
//				default_exp_time = "8334";/* us */
//				embedded_metadata_height = "0";
//			};

			ports {
				status = "okay";
				#address-cells = <1>;
				#size-cells = <0>;

				port@0 {
					status = "okay";
					reg = <0>;
					e3326_ov5693_out0: endpoint {
						status = "okay";
						port-index = <2>;
						bus-width = <2>;
						remote-endpoint = <&e3326_csi_in0>;
					};
				};
			};
		};
	};

	e3326_lens_ov5693@P5V27C {
		status = "okay";
		min_focus_distance = "0.0";
		hyper_focal = "0.0";
		focal_length = "2.67";
		f_number = "2.0";
		aperture = "2.0";
	};

	tegra-camera-platform {
		status = "okay";
		compatible = "nvidia, tegra-camera-platform";
		/**
		* Physical settings to calculate max ISO BW
		*
		* num_csi_lanes = <>;
		* Total number of CSI lanes when all cameras are active
		*
		* max_lane_speed = <>;
		* Max lane speed in Kbit/s
		*
		* min_bits_per_pixel = <>;
		* Min bits per pixel
		*
		* vi_peak_byte_per_pixel = <>;
		* Max byte per pixel for the VI ISO case
		*
		* vi_bw_margin_pct = <>;
		* Vi bandwidth margin in percentage
		*
		* max_pixel_rate = <>;
		* Max pixel rate in Kpixel/s for the ISP ISO case
		*
		* isp_peak_byte_per_pixel = <>;
		* Max byte per pixel for the ISP ISO case
		*
		* isp_bw_margin_pct = <>;
		* Isp bandwidth margin in percentage
		*/
		num_csi_lanes = <2>;
		max_lane_speed = <1500000>;
		min_bits_per_pixel = <8>;
		vi_peak_byte_per_pixel = <2>;
		vi_bw_margin_pct = <25>;
		max_pixel_rate = <160000>;
		isp_peak_byte_per_pixel = <5>;
		isp_bw_margin_pct = <25>;

		/**
		* The general guideline for naming badge_info contains 3 parts, and is as follows,
		* The first part is the camera_board_id for the module; if the module is in a FFD
		* platform, then use the platform name for this part.
		* The second part contains the position of the module, ex. “rear” or “front”.
		* The third part contains the last 6 characters of a part number which is found
		* in the module's specsheet from the vender.
		*/
		modules {
			status = "okay";
			module0 {
				status = "okay";
				badge = "e3326_front_P5V27C";
				position = "rear";
				orientation = "1";
				drivernode0 {
					status = "okay";
					/* Declare PCL support driver (classically known as guid)  */
					pcl_id = "v4l2_sensor";
					/* Driver v4l2 device name */
					devname = "ov5693 2-0036";
					/* Declare the device-tree hierarchy to driver instance */
					proc-device-tree = "/proc/device-tree/i2c@3180000/ov5693_c@36";
				};
				drivernode1 {
					status = "okay";
					/* Declare PCL support driver (classically known as guid)  */
					pcl_id = "v4l2_lens";
					proc-device-tree = "/proc/device-tree/e3326_lens_ov5693@P5V27C/";
				};
			};
		};
	};
};

2-) tegra194-p2822-0000-camera-e3326-a00.dtsi

/ {
	i2c@3180000 {
		status = "okay";
		ov5693_c@36 {
			status = "okay";
			/* Define any required hw resources needed by driver */
			/* ie. clocks, io pins, power sources */
			/* mclk-index indicates the index of the */
			/* mclk-name with in the clock-names array */

			clocks = <&bpmp_clks TEGRA194_CLK_EXTPERIPH1>,
					 <&bpmp_clks TEGRA194_CLK_PLLP_OUT0>;
			clock-names = "extperiph1", "pllp_grtba";
			mclk = "extperiph1";
			clock-frequency = <24000000>;
			reset-gpios = <&tegra_main_gpio CAM0_RST_L GPIO_ACTIVE_HIGH>;
			pwdn-gpios = <&tegra_main_gpio CAM0_PWDN GPIO_ACTIVE_HIGH>;
			vana-supply = <&p2822_avdd_cam_2v8>;
			vif-supply = <&p2822_vdd_1v8_cvb>;
		};
	};

	gpio@2200000 {
		status = "okay";
		camera-control-output-low {
			status = "okay";
			gpio-hog;
			output-low;
			gpios = <CAM0_RST_L 0 CAM0_PWDN 0>;
			label = "cam0-rst", "cam0-pwdn";
		};
	};
};

3-) disable plugin manager

/*
 * Top level DTS file for CVM:P2888-0001 and CVB:P2822-0000.
 */
//#include "common/tegra194-p2888-0001-p2822-0000-common.dtsi"
//#include "common/tegra194-p2822-camera-modules.dtsi"
//#include "common/tegra194-audio-p2822-0000.dtsi"
#include "common/tegra194-p2888-0001-p2822-0000-common.dtsi"
//#include "common/tegra194-p2822-camera-modules.dtsi"
//#include "t19x-common-modules/tegra194-camera-plugin-manager.dtsi"
#include "common/tegra194-p2822-0000-camera-e3326-a00.dtsi"

#if defined(LINUX_VERSION) && LINUX_VERSION >= 419

/ {
	/* FIXME: K5.4 overrides */
	bpmp {
		i2c {
			spmic@3c {
				interrupt-parent = <&intc>;
				interrupts = <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>;
			};
		};
	};

	hda@3510000 {
		power-domains = <&bpmp TEGRA194_POWER_DOMAIN_DISP>;
		resets = <&bpmp TEGRA194_RESET_HDA>,
			 <&bpmp TEGRA194_RESET_HDA2CODEC_2X>,
			 <&bpmp TEGRA194_RESET_HDA2HDMICODEC>;
		reset-names = "hda", "hda2codec_2x", "hda2hdmi";
	};

	serial@3100000 {
		compatible = "nvidia,tegra194-hsuart";
	};

	tegra-cache {
		status = "okay";
	};
};

#endif

4-)nv_ov5693.c driver for work without I2C:

#include <linux/slab.h>
#include <linux/uaccess.h>
#include <linux/gpio.h>
#include <linux/module.h>
#include <linux/debugfs.h>

#include <linux/seq_file.h>
#include <linux/of.h>
#include <linux/of_device.h>
#include <linux/of_gpio.h>
#include <media/tegra-v4l2-camera.h>
#include <media/tegracam_core.h>
#include <media/ov5693.h>


#include "../platform/tegra/camera/camera_gpio.h"
#include "ov5693_mode_tbls.h"
#define CREATE_TRACE_POINTS
#include <trace/events/ov5693.h>

#define OV5693_MAX_COARSE_DIFF		6
#define OV5693_MAX_FRAME_LENGTH	(0x7fff)
#define OV5693_MIN_EXPOSURE_COARSE	(0x0002)
#define OV5693_MAX_EXPOSURE_COARSE	\
	(OV5693_MAX_FRAME_LENGTH-OV5693_MAX_COARSE_DIFF)
#define OV5693_DEFAULT_LINE_LENGTH	(0xA80)
#define OV5693_DEFAULT_PIXEL_CLOCK	(160)
#define OV5693_DEFAULT_FRAME_LENGTH	(0x07C0)
#define OV5693_DEFAULT_EXPOSURE_COARSE	\
	(OV5693_DEFAULT_FRAME_LENGTH-OV5693_MAX_COARSE_DIFF)

static const u32 ctrl_cid_list[] = {
	TEGRA_CAMERA_CID_GAIN,
	TEGRA_CAMERA_CID_EXPOSURE,
	TEGRA_CAMERA_CID_EXPOSURE_SHORT,
	TEGRA_CAMERA_CID_FRAME_RATE,
	TEGRA_CAMERA_CID_HDR_EN,
#if 0
	TEGRA_CAMERA_CID_EEPROM_DATA,
	TEGRA_CAMERA_CID_OTP_DATA,
	TEGRA_CAMERA_CID_FUSE_ID,
#endif
};

struct ov5693 {
	struct camera_common_eeprom_data eeprom[OV5693_EEPROM_NUM_BLOCKS];
	u8				eeprom_buf[OV5693_EEPROM_SIZE];
	u8				otp_buf[OV5693_OTP_SIZE];
	struct i2c_client		*i2c_client;
	struct v4l2_subdev		*subdev;
	u8				fuse_id[OV5693_FUSE_ID_SIZE];
	const char			*devname;
	struct dentry			*debugfs_dir;
	struct mutex			streaming_lock;
	bool				streaming;

	s32				group_hold_prev;
	u32				frame_length;
	bool				group_hold_en;
	struct camera_common_i2c	i2c_dev;
	struct camera_common_data	*s_data;
	struct tegracam_device		*tc_dev;
};

static struct regmap_config ov5693_regmap_config = {
	.reg_bits = 16,
	.val_bits = 8,
};

static inline void ov5693_get_frame_length_regs(ov5693_reg *regs,
				u32 frame_length)
{	
	printk(KERN_DEBUG "ov5693 1\n");
	regs->addr = OV5693_FRAME_LENGTH_ADDR_MSB;
	regs->val = (frame_length >> 8) & 0xff;
	(regs + 1)->addr = OV5693_FRAME_LENGTH_ADDR_LSB;
	(regs + 1)->val = (frame_length) & 0xff;
	printk("ov5693 2\n");
}

static inline void ov5693_get_coarse_time_regs(ov5693_reg *regs,
				u32 coarse_time)
{
	printk(KERN_DEBUG"ov5693 3\n");
	regs->addr = OV5693_COARSE_TIME_ADDR_1;
	regs->val = (coarse_time >> 12) & 0xff;
	(regs + 1)->addr = OV5693_COARSE_TIME_ADDR_2;
	(regs + 1)->val = (coarse_time >> 4) & 0xff;
	(regs + 2)->addr = OV5693_COARSE_TIME_ADDR_3;
	(regs + 2)->val = (coarse_time & 0xf) << 4;
	printk("ov5693 4\n");
}

static inline void ov5693_get_coarse_time_short_regs(ov5693_reg *regs,
				u32 coarse_time)
{
	printk("ov5693 5\n");
	regs->addr = OV5693_COARSE_TIME_SHORT_ADDR_1;
	regs->val = (coarse_time >> 12) & 0xff;
	(regs + 1)->addr = OV5693_COARSE_TIME_SHORT_ADDR_2;
	(regs + 1)->val = (coarse_time >> 4) & 0xff;
	(regs + 2)->addr = OV5693_COARSE_TIME_SHORT_ADDR_3;
	(regs + 2)->val = (coarse_time & 0xf) << 4;
	printk("ov5693 6\n");
}

static inline void ov5693_get_gain_regs(ov5693_reg *regs,
				u16 gain)
{
	printk("ov5693 7\n");
	regs->addr = OV5693_GAIN_ADDR_MSB;
	regs->val = (gain >> 8) & 0xff;

	(regs + 1)->addr = OV5693_GAIN_ADDR_LSB;
	(regs + 1)->val = (gain) & 0xff;
	printk("ov5693 8\n");
}

static int test_mode;
module_param(test_mode, int, 0644);

static inline int ov5693_read_reg(struct camera_common_data *s_data,
				u16 addr, u8 *val)
{
	
	int err = 0;
	printk("ov5693 9\n");
#if 0
	u32 reg_val = 0;

	err = regmap_read(s_data->regmap, addr, &reg_val);
	*val = reg_val & 0xFF;
#endif
	printk("ov5693 11\n");
	return err;
}

static int ov5693_write_reg(struct camera_common_data *s_data, u16 addr, u8 val)
{
	
	int err = 0;
	printk("ov5693 12\n");
#if 0
	struct device *dev = s_data->dev;

	err = regmap_write(s_data->regmap, addr, val);

	if (err)
		dev_err(dev, "%s: i2c write failed, 0x%x = %x\n",
			__func__, addr, val);
#endif
	printk("ov5693 13\n");
	return err;
}

static int ov5693_write_table(struct ov5693 *priv,
			      const ov5693_reg table[])
{
	printk("ov5693 14\n");
#if 0
	struct camera_common_data *s_data = priv->s_data;

	return regmap_util_write_table_8(s_data->regmap,
					 table,
					 NULL, 0,
					 OV5693_TABLE_WAIT_MS,
					 OV5693_TABLE_END);
#else
	printk("ov5693 15\n");
	return 0;
#endif

}

#if 0
static void ov5693_gpio_set(struct camera_common_data *s_data,
			    unsigned int gpio, int val)
{
	struct camera_common_pdata *pdata = s_data->pdata;

	if (pdata && pdata->use_cam_gpio)
		cam_gpio_ctrl(s_data->dev, gpio, val, 1);
	else {
		if (gpio_cansleep(gpio))
			gpio_set_value_cansleep(gpio, val);
		else
			gpio_set_value(gpio, val);
	}
}
#endif

static int ov5693_power_on(struct camera_common_data *s_data)
{
	
	int err = 0;
	struct camera_common_power_rail *pw = s_data->power;
	printk("ov5693 16\n");
#if 0
	struct camera_common_pdata *pdata = s_data->pdata;
	struct device *dev = s_data->dev;


	dev_dbg(dev, "%s: power on\n", __func__);

	if (pdata && pdata->power_on) {
		err = pdata->power_on(pw);
		if (err)
			dev_err(dev, "%s failed.\n", __func__);
		else
			pw->state = SWITCH_ON;
		return err;
	}
	/* sleeps calls in the sequence below are for internal device
	 * signal propagation as specified by sensor vendor
	 */

	if (pw->avdd)
		err = regulator_enable(pw->avdd);
	if (err)
		goto ov5693_avdd_fail;

	if (pw->iovdd)
		err = regulator_enable(pw->iovdd);
	if (err)
		goto ov5693_iovdd_fail;

	usleep_range(1, 2);
	if (gpio_is_valid(pw->pwdn_gpio))
		ov5693_gpio_set(s_data, pw->pwdn_gpio, 1);

	/*
	 * datasheet 2.9: reset requires ~2ms settling time
	 * a power on reset is generated after core power becomes stable
	 */
	usleep_range(2000, 2010);

	if (gpio_is_valid(pw->reset_gpio))
		ov5693_gpio_set(s_data, pw->reset_gpio, 1);

	/* datasheet fig 2-9: t3 */
	usleep_range(2000, 2010);
#endif
	pw->state = SWITCH_ON;
	printk("ov5693 17\n");
	return err;
#if 0
	return 0;
ov5693_iovdd_fail:
	regulator_disable(pw->avdd);

ov5693_avdd_fail:
	dev_err(dev, "%s failed.\n", __func__);
	return -ENODEV;
#endif
}

static int ov5693_power_off(struct camera_common_data *s_data)
{
	
	int err = 0;
	struct camera_common_power_rail *pw = s_data->power;
	printk("ov5693 18\n");
#if 0
	struct device *dev = s_data->dev;
	struct camera_common_pdata *pdata = s_data->pdata;

	dev_dbg(dev, "%s: power off\n", __func__);

	if (pdata && pdata->power_off) {
		err = pdata->power_off(pw);
		if (!err) {
			goto power_off_done;
		} else {
			dev_err(dev, "%s failed.\n", __func__);
			return err;
		}
	}

	/* sleeps calls in the sequence below are for internal device
	 * signal propagation as specified by sensor vendor
	 */
	usleep_range(21, 25);
	if (gpio_is_valid(pw->pwdn_gpio))
		ov5693_gpio_set(s_data, pw->pwdn_gpio, 0);
	usleep_range(1, 2);
	if (gpio_is_valid(pw->reset_gpio))
		ov5693_gpio_set(s_data, pw->reset_gpio, 0);

	/* datasheet 2.9: reset requires ~2ms settling time*/
	usleep_range(2000, 2010);

	if (pw->iovdd)
		regulator_disable(pw->iovdd);
	if (pw->avdd)
		regulator_disable(pw->avdd);

power_off_done:
	pw->state = SWITCH_OFF;
	return 0;
#else
	pw->state = SWITCH_OFF;
	printk("ov5693 19\n");
	return err;
#endif
}

static int ov5693_power_put(struct tegracam_device *tc_dev)
{
	printk("ov5693 20\n");
#if 0
	struct camera_common_data *s_data = tc_dev->s_data;
	struct camera_common_power_rail *pw = s_data->power;
	struct camera_common_pdata *pdata = s_data->pdata;
	struct device *dev = tc_dev->dev;

	if (unlikely(!pw))
		return -EFAULT;

	if (pdata && pdata->use_cam_gpio)
		cam_gpio_deregister(dev, pw->pwdn_gpio);
	else {
		if (gpio_is_valid(pw->pwdn_gpio))
			gpio_free(pw->pwdn_gpio);
		if (gpio_is_valid(pw->reset_gpio))
			gpio_free(pw->reset_gpio);
	}
#endif
	printk("ov5693 21\n");
	return 0;
}

static int ov5693_power_get(struct tegracam_device *tc_dev)
{
	
	struct camera_common_data *s_data = tc_dev->s_data;
	struct camera_common_power_rail *pw = s_data->power;
	printk("ov5693 22\n");
#if 0
	struct camera_common_pdata *pdata = s_data->pdata;
	struct device *dev = tc_dev->dev;
	const char *mclk_name;
	const char *parentclk_name;
	struct clk *parent;
	int err = 0, ret = 0;

	if (!pdata) {
		dev_err(dev, "pdata missing\n");
		return -EFAULT;
	}

	mclk_name = pdata->mclk_name ?
		    pdata->mclk_name : "cam_mclk1";
	pw->mclk = devm_clk_get(dev, mclk_name);
	if (IS_ERR(pw->mclk)) {
		dev_err(dev, "unable to get clock %s\n", mclk_name);
		return PTR_ERR(pw->mclk);
	}
	parentclk_name = pdata->parentclk_name;
	if (parentclk_name) {
		parent = devm_clk_get(dev, parentclk_name);
		if (IS_ERR(parent)) {
			dev_err(dev, "unable to get parent clcok %s",
				parentclk_name);
		} else
			clk_set_parent(pw->mclk, parent);
	}

	/* analog 2.8v */
	err |= camera_common_regulator_get(dev,
			&pw->avdd, pdata->regulators.avdd);
	/* IO 1.8v */
	err |= camera_common_regulator_get(dev,
			&pw->iovdd, pdata->regulators.iovdd);

	if (!err) {
		pw->reset_gpio = pdata->reset_gpio;
		pw->pwdn_gpio = pdata->pwdn_gpio;
	}
	if (pdata->use_cam_gpio) {
		err = cam_gpio_register(dev, pw->pwdn_gpio);
		if (err)
			dev_err(dev, "%s ERR can't register cam gpio %u!\n",
				 __func__, pw->pwdn_gpio);
	} else {
		if (gpio_is_valid(pw->pwdn_gpio)) {
			ret = gpio_request(pw->pwdn_gpio, "cam_pwdn_gpio");
			if (ret < 0) {
				dev_dbg(dev, "%s can't request pwdn_gpio %d\n",
					__func__, ret);
			}
			gpio_direction_output(pw->pwdn_gpio, 1);
		}
		if (gpio_is_valid(pw->reset_gpio)) {
			ret = gpio_request(pw->reset_gpio, "cam_reset_gpio");
			if (ret < 0) {
				dev_dbg(dev, "%s can't request reset_gpio %d\n",
					__func__, ret);
			}
			gpio_direction_output(pw->reset_gpio, 1);
		}
	}

	pw->state = SWITCH_OFF;
	return err;
#else
	pw->state = SWITCH_OFF;
	printk("ov5693 23\n");
	return 0;
#endif
}

static int ov5693_set_gain(struct tegracam_device *tc_dev, s64 val);
static int ov5693_set_frame_rate(struct tegracam_device *tc_dev, s64 val);
static int ov5693_set_exposure(struct tegracam_device *tc_dev, s64 val);
static int ov5693_set_exposure_short(struct tegracam_device *tc_dev, s64 val);

static const struct of_device_id ov5693_of_match[] = {
	{
		.compatible = "nvidia,ov5693",
	},
	{ },
};

static int ov5693_set_group_hold(struct tegracam_device *tc_dev, bool val)
{
	
	int err;
	struct ov5693 *priv = tc_dev->priv;
	int gh_prev = switch_ctrl_qmenu[priv->group_hold_prev];
	struct device *dev = tc_dev->dev;
	printk("ov5693 24\n");
	if (priv->group_hold_en == true && gh_prev == SWITCH_OFF) {
		camera_common_i2c_aggregate(&priv->i2c_dev, true);
		/* enter group hold */
		err = ov5693_write_reg(priv->s_data,
				       OV5693_GROUP_HOLD_ADDR, val);
		if (err)
			goto fail;

		priv->group_hold_prev = 1;

		dev_info(dev, "%s: enter group hold\n", __func__);
	} else if (priv->group_hold_en == false && gh_prev == SWITCH_ON) {
		/* leave group hold */
		err = ov5693_write_reg(priv->s_data,
				       OV5693_GROUP_HOLD_ADDR, 0x11);
		if (err)
			goto fail;

		err = ov5693_write_reg(priv->s_data,
				       OV5693_GROUP_HOLD_ADDR, 0x61);
		if (err)
			goto fail;
#if 1
		camera_common_i2c_aggregate(&priv->i2c_dev, false);
#endif
		priv->group_hold_prev = 0;

		dev_info(dev, "%s: leave group hold\n", __func__);
	}
	printk("ov5693 25\n");
	return 0;

fail:
	printk("ov5693 26\n");
	dev_info(dev, "%s: Group hold control error\n", __func__);
	return err;
}

static int ov5693_set_gain(struct tegracam_device *tc_dev, s64 val)
{
	
	struct camera_common_data *s_data = tc_dev->s_data;
	struct ov5693 *priv = (struct ov5693 *)tc_dev->priv;
	struct device *dev = tc_dev->dev;
	const struct sensor_mode_properties *mode =
		&s_data->sensor_props.sensor_modes[s_data->mode_prop_idx];
	ov5693_reg reg_list[2];
	int err;
	u16 gain;
	int i;
	printk("ov5693 27\n");
	if (!priv->group_hold_prev)
		ov5693_set_group_hold(tc_dev, 1);

	/* translate value */
	gain = (u16) (((val * 16) +
			(mode->control_properties.gain_factor / 2)) /
			mode->control_properties.gain_factor);
	ov5693_get_gain_regs(reg_list, gain);
	dev_info(dev, "%s: gain %d val: %lld\n", __func__, gain, val);

	for (i = 0; i < 2; i++) {
		err = ov5693_write_reg(s_data, reg_list[i].addr,
			 reg_list[i].val);
		if (err)
			goto fail;
	}
	printk("ov5693 28\n");
	return 0;

fail:
	printk("ov5693 29\n");
	dev_info(dev, "%s: GAIN control error\n", __func__);
	return err;
}

static int ov5693_set_frame_rate(struct tegracam_device *tc_dev, s64 val)
{
	struct camera_common_data *s_data = tc_dev->s_data;
	struct device *dev = tc_dev->dev;
	struct ov5693 *priv = tc_dev->priv;
	const struct sensor_mode_properties *mode =
		&s_data->sensor_props.sensor_modes[s_data->mode_prop_idx];
	ov5693_reg reg_list[2];
	
	int err;
	u32 frame_length;
	int i;
	printk("ov5693 30\n");
	if (!priv->group_hold_prev)
		ov5693_set_group_hold(tc_dev, 1);

	frame_length =  mode->signal_properties.pixel_clock.val *
		mode->control_properties.framerate_factor /
		mode->image_properties.line_length / val;

	ov5693_get_frame_length_regs(reg_list, frame_length);
	dev_info(dev, "%s: val: %d\n", __func__, frame_length);

	for (i = 0; i < 2; i++) {
		err = ov5693_write_reg(s_data, reg_list[i].addr,
			 reg_list[i].val);
		if (err)
			goto fail;
	}

	priv->frame_length = frame_length;
	printk("ov5693 31\n");
	return 0;

fail:
	printk("ov5693 32\n");
	dev_info(dev, "%s: FRAME_LENGTH control error\n", __func__);
	return err;
}

static int ov5693_set_exposure(struct tegracam_device *tc_dev, s64 val)
{
	struct camera_common_data *s_data = tc_dev->s_data;
	struct device *dev = tc_dev->dev;
	struct ov5693 *priv = tc_dev->priv;
	const s32 max_coarse_time = priv->frame_length - OV5693_MAX_COARSE_DIFF;
	const struct sensor_mode_properties *mode =
		&s_data->sensor_props.sensor_modes[s_data->mode_prop_idx];
	ov5693_reg reg_list[3];
	int err;
	
	u32 coarse_time;
	int i;
	printk("ov5693 33\n");
	if (!priv->group_hold_prev)
		ov5693_set_group_hold(tc_dev, 1);

	coarse_time = (u32)(((mode->signal_properties.pixel_clock.val*val)
			/mode->image_properties.line_length)/
			mode->control_properties.exposure_factor);
	if (coarse_time < OV5693_MIN_EXPOSURE_COARSE)
		coarse_time = OV5693_MIN_EXPOSURE_COARSE;
	else if (coarse_time > max_coarse_time)
		coarse_time = max_coarse_time;
	ov5693_get_coarse_time_regs(reg_list, coarse_time);
	dev_info(dev, "%s: val: %d\n", __func__, coarse_time);

	for (i = 0; i < 3; i++) {
		err = ov5693_write_reg(s_data, reg_list[i].addr,
			 reg_list[i].val);
		if (err)
			goto fail;
	}
	printk("ov5693 34\n");
	return 0;

fail:
	printk("ov5693 35\n");
	dev_info(dev, "%s: COARSE_TIME control error\n", __func__);
	return err;
}

static int ov5693_set_exposure_short(struct tegracam_device *tc_dev, s64 val)
{
	struct camera_common_data *s_data = tc_dev->s_data;
	struct device *dev = tc_dev->dev;
	struct ov5693 *priv = tc_dev->priv;
	const struct sensor_mode_properties *mode =
		&s_data->sensor_props.sensor_modes[s_data->mode_prop_idx];
	ov5693_reg reg_list[3];
	int err;
	struct v4l2_control hdr_control;
	int hdr_en;
	u32 coarse_time_short;
	int i;
	printk("ov5693 36\n");
	if (!priv->group_hold_prev)
		ov5693_set_group_hold(tc_dev, 1);

	/* check hdr enable ctrl */
	hdr_control.id = TEGRA_CAMERA_CID_HDR_EN;

	err = camera_common_g_ctrl(s_data, &hdr_control);
	if (err < 0) {
		dev_err(dev, "could not find device ctrl.\n");
		return err;
	}

	hdr_en = switch_ctrl_qmenu[hdr_control.value];
	if (hdr_en == SWITCH_OFF)
		return 0;

	coarse_time_short = (u32)(((mode->signal_properties.pixel_clock.val*val)
				/mode->image_properties.line_length)
				/mode->control_properties.exposure_factor);

	ov5693_get_coarse_time_short_regs(reg_list, coarse_time_short);
	dev_info(dev, "%s: val: %d\n", __func__, coarse_time_short);

	for (i = 0; i < 3; i++) {
		err = ov5693_write_reg(s_data, reg_list[i].addr,
			 reg_list[i].val);
		if (err)
			goto fail;
	}
	printk("ov5693 37\n");
	return 0;

fail:
	printk("ov5693 38\n");
	dev_info(dev, "%s: COARSE_TIME_SHORT control error\n", __func__);
	return err;
}


static int ov5693_fill_string_ctrl(struct tegracam_device *tc_dev,
				struct v4l2_ctrl *ctrl)
{
	printk("ov5693 39\n");
#if 0
	struct ov5693 *priv = tc_dev->priv;
	int i, ret;

	switch (ctrl->id) {
	case TEGRA_CAMERA_CID_EEPROM_DATA:
		for (i = 0; i < OV5693_EEPROM_SIZE; i++) {
			ret = sprintf(&ctrl->p_new.p_char[i*2], "%02x",
				priv->eeprom_buf[i]);
			if (ret < 0)
				return -EINVAL;
		}
		break;
	case TEGRA_CAMERA_CID_OTP_DATA:
		for (i = 0; i < OV5693_OTP_SIZE; i++) {
			ret = sprintf(&ctrl->p_new.p_char[i*2], "%02x",
				priv->otp_buf[i]);
			if (ret < 0)
				return -EINVAL;
		}
		break;
	case TEGRA_CAMERA_CID_FUSE_ID:
		for (i = 0; i < OV5693_FUSE_ID_SIZE; i++) {
			ret = sprintf(&ctrl->p_new.p_char[i*2], "%02x",
				priv->fuse_id[i]);
			if (ret < 0)
				return -EINVAL;
		}
		break;
	default:
		return -EINVAL;
	}
	ctrl->p_cur.p_char = ctrl->p_new.p_char;
#endif
	printk("ov5693 40\n");
	return 0;
}

static int ov5693_eeprom_device_release(struct ov5693 *priv)
{
	
	int i;
	printk("ov5693 41\n");
	for (i = 0; i < OV5693_EEPROM_NUM_BLOCKS; i++) {
		if (priv->eeprom[i].i2c_client != NULL) {
			i2c_unregister_device(priv->eeprom[i].i2c_client);
			priv->eeprom[i].i2c_client = NULL;
		}
	}
	printk("ov5693 42\n");
	return 0;
}

static int ov5693_eeprom_device_init(struct ov5693 *priv)
{
	printk("ov5693 43\n");
#if 0
	struct camera_common_pdata *pdata =  priv->s_data->pdata;
	char *dev_name = "eeprom_ov5693";
	static struct regmap_config eeprom_regmap_config = {
		.reg_bits = 8,
		.val_bits = 8,
	};
	int i;
	int err;

	if (!pdata->has_eeprom)
		return -EINVAL;

	for (i = 0; i < OV5693_EEPROM_NUM_BLOCKS; i++) {
		priv->eeprom[i].adap = i2c_get_adapter(
				priv->i2c_client->adapter->nr);
		memset(&priv->eeprom[i].brd, 0, sizeof(priv->eeprom[i].brd));
		strncpy(priv->eeprom[i].brd.type, dev_name,
				sizeof(priv->eeprom[i].brd.type));
		priv->eeprom[i].brd.addr = OV5693_EEPROM_ADDRESS + i;
#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 4, 0)
		priv->eeprom[i].i2c_client = i2c_new_device(
				priv->eeprom[i].adap, &priv->eeprom[i].brd);
#else
		priv->eeprom[i].i2c_client = i2c_new_client_device(
				priv->eeprom[i].adap, &priv->eeprom[i].brd);
#endif

		priv->eeprom[i].regmap = devm_regmap_init_i2c(
			priv->eeprom[i].i2c_client, &eeprom_regmap_config);
		if (IS_ERR(priv->eeprom[i].regmap)) {
			err = PTR_ERR(priv->eeprom[i].regmap);
			ov5693_eeprom_device_release(priv);
			return err;
		}
	}
#endif
	printk("ov5693 44\n");
	return 0;
}

static int ov5693_read_eeprom(struct ov5693 *priv)
{
	printk("ov5693 45\n");
#if 0
	int err, i;
	for (i = 0; i < OV5693_EEPROM_NUM_BLOCKS; i++) {
		err = regmap_bulk_read(priv->eeprom[i].regmap, 0,
			&priv->eeprom_buf[i * OV5693_EEPROM_BLOCK_SIZE],
			OV5693_EEPROM_BLOCK_SIZE);
		if (err)
			return err;
	}
#endif
	printk("ov5693 46\n");
	return 0;
}

static int ov5693_read_otp_bank(struct ov5693 *priv,
				u8 *buf, int bank, u16 addr, int size)
{
	
	int err;
	printk("ov5693 47\n");
	/* sleeps calls in the sequence below are for internal device
	 * signal propagation as specified by sensor vendor
	 */
	usleep_range(10000, 11000);
	mutex_lock(&priv->streaming_lock);
	err = ov5693_write_table(priv, mode_table[OV5693_MODE_START_STREAM]);
	if (err) {
		mutex_unlock(&priv->streaming_lock);
		return err;
	} else {
		priv->streaming = true;
		mutex_unlock(&priv->streaming_lock);
	}

	err = ov5693_write_reg(priv->s_data, OV5693_OTP_BANK_SELECT_ADDR,
			       0xC0 | bank);
	if (err)
		return err;

	err = ov5693_write_reg(priv->s_data, OV5693_OTP_LOAD_CTRL_ADDR, 0x01);
	if (err)
		return err;

	usleep_range(10000, 11000);
#if 0
	err = regmap_bulk_read(priv->s_data->regmap, addr, buf, size);

	if (err)
		return err;
#endif
	mutex_lock(&priv->streaming_lock);
	err = ov5693_write_table(priv, mode_table[OV5693_MODE_STOP_STREAM]);
	if (err) {
		mutex_unlock(&priv->streaming_lock);
		return err;
	} else {
		priv->streaming = false;
		mutex_unlock(&priv->streaming_lock);
	}
	printk("ov5693 48\n");
	return 0;
}

static int ov5693_otp_setup(struct ov5693 *priv)
{
	struct device *dev = priv->s_data->dev;
	int err = 0;
	int i;
	printk("ov5693 49\n");
	for (i = 0; i < OV5693_OTP_NUM_BANKS; i++) {
		err = ov5693_read_otp_bank(priv,
					&priv->otp_buf[i
					* OV5693_OTP_BANK_SIZE],
					i,
					OV5693_OTP_BANK_START_ADDR,
					OV5693_OTP_BANK_SIZE);
		if (err) {
			dev_err(dev, "could not read otp bank\n");
			goto ret;
		}
	}
	printk("ov5693 50\n");
ret:
	printk("ov5693 51\n");
	return err;
}

static int ov5693_fuse_id_setup(struct ov5693 *priv)
{
	struct device *dev = priv->s_data->dev;
	int err;
	printk("ov5693 52\n");
	err = ov5693_read_otp_bank(priv,
				&priv->fuse_id[0],
				OV5693_FUSE_ID_OTP_BANK,
				OV5693_FUSE_ID_OTP_START_ADDR,
				OV5693_FUSE_ID_SIZE);
	if (err) {
		dev_err(dev, "could not read otp bank\n");
		goto ret;
	}
	printk("ov5693 53\n");
ret:
	printk("ov5693 54\n");
	return err;
}

MODULE_DEVICE_TABLE(of, ov5693_of_match);

static struct camera_common_pdata *ov5693_parse_dt(struct tegracam_device
							*tc_dev)
{
	struct device *dev = tc_dev->dev;
	struct device_node *node = dev->of_node;
	struct camera_common_pdata *board_priv_pdata;
	const struct of_device_id *match;
	
#if 0
	int gpio;
#endif
	int err;
	struct camera_common_pdata *ret = NULL;
	printk("ov5693 55\n");
#if 1
    dev_info(dev, "%s:akl entry\n", __func__);
#endif
	if (!node)
		return NULL;

	match = of_match_device(ov5693_of_match, dev);
	if (!match) {
		dev_err(dev, "Failed to find matching dt id\n");
		return NULL;
	}

	board_priv_pdata = devm_kzalloc(dev,
			   sizeof(*board_priv_pdata), GFP_KERNEL);
	if (!board_priv_pdata)
		return NULL;

	err = camera_common_parse_clocks(dev,
					 board_priv_pdata);
	if (err) {
		dev_err(dev, "Failed to find clocks\n");
		goto error;
	}
#if 0
	gpio = of_get_named_gpio(node, "pwdn-gpios", 0);
	if (gpio < 0) {
		if (gpio == -EPROBE_DEFER) {
			ret = ERR_PTR(-EPROBE_DEFER);
			goto error;
		}
		gpio = 0;
	}
	board_priv_pdata->pwdn_gpio = (unsigned int)gpio;

	gpio = of_get_named_gpio(node, "reset-gpios", 0);
	if (gpio < 0) {
		/* reset-gpio is not absolutely needed */
		if (gpio == -EPROBE_DEFER) {
			ret = ERR_PTR(-EPROBE_DEFER);
			goto error;
		}
		dev_dbg(dev, "reset gpios not in DT\n");
		gpio = 0;
	}
	board_priv_pdata->reset_gpio = (unsigned int)gpio;

	board_priv_pdata->use_cam_gpio =
		of_property_read_bool(node, "cam, use-cam-gpio");

	err = of_property_read_string(node, "avdd-reg",
			&board_priv_pdata->regulators.avdd);
	if (err) {
		dev_err(dev, "avdd-reg not in DT\n");
		goto error;
	}
	err = of_property_read_string(node, "iovdd-reg",
			&board_priv_pdata->regulators.iovdd);
	if (err) {
		dev_err(dev, "iovdd-reg not in DT\n");
		goto error;
	}

	board_priv_pdata->has_eeprom =
		of_property_read_bool(node, "has-eeprom");
	board_priv_pdata->v_flip = of_property_read_bool(node, "vertical-flip");
	board_priv_pdata->h_mirror = of_property_read_bool(node,
							 "horizontal-mirror");
#else
	dev_info(dev, "%s:akl exit\n", __func__);
#endif
	printk("ov5693 56\n");
	return board_priv_pdata;

error:
	printk("ov5693 57\n");
	devm_kfree(dev, board_priv_pdata);
	return ret;
}

static int ov5693_set_mode(struct tegracam_device *tc_dev)
{
	struct ov5693 *priv = (struct ov5693 *)tegracam_get_privdata(tc_dev);
	struct camera_common_data *s_data = tc_dev->s_data;
	int err;
	printk("ov5693 58\n");
	if (s_data->mode_prop_idx < 0) {
		dev_err(tc_dev->dev, "akl could not set mode\n");
		return -EINVAL;
	}

	err = ov5693_write_table(priv, mode_table[s_data->mode_prop_idx]);
	if (err)
		return err;
	printk("ov5693 59\n");
	return 0;
}

static int ov5693_start_streaming(struct tegracam_device *tc_dev)
{
	struct ov5693 *priv = (struct ov5693 *)tegracam_get_privdata(tc_dev);
	struct camera_common_data *s_data = tc_dev->s_data;
	struct camera_common_pdata *pdata = s_data->pdata;
	struct device *dev = s_data->dev;
	int err;
	u8 val;
	printk("ov5693 60\n");
	mutex_lock(&priv->streaming_lock);
	err = ov5693_write_table(priv, mode_table[OV5693_MODE_START_STREAM]);
	if (err) {
		mutex_unlock(&priv->streaming_lock);
		goto exit;
	} else {
		priv->streaming = true;
		mutex_unlock(&priv->streaming_lock);
	}
	if (pdata->v_flip) {
		ov5693_read_reg(s_data, OV5693_TIMING_REG20, &val);
		ov5693_write_reg(s_data, OV5693_TIMING_REG20,
				 val | VERTICAL_FLIP);
	}
	if (pdata->h_mirror) {
		ov5693_read_reg(s_data, OV5693_TIMING_REG21, &val);
		ov5693_write_reg(s_data, OV5693_TIMING_REG21,
				 val | HORIZONTAL_MIRROR_MASK);
	} else {
		ov5693_read_reg(s_data, OV5693_TIMING_REG21, &val);
		ov5693_write_reg(s_data, OV5693_TIMING_REG21,
				 val & (~HORIZONTAL_MIRROR_MASK));
	}
	if (test_mode)
		err = ov5693_write_table(priv,
			mode_table[OV5693_MODE_TEST_PATTERN]);
	printk("ov5693 61\n");
	return 0;

exit:
	printk("ov5693 62\n");
	dev_err(dev, "%s: error starting stream\n", __func__);
	return err;
}

static int ov5693_stop_streaming(struct tegracam_device *tc_dev)
{
	struct camera_common_data *s_data = tc_dev->s_data;
	struct ov5693 *priv = (struct ov5693 *)tegracam_get_privdata(tc_dev);
	struct device *dev = s_data->dev;
	u32 frame_time;
	int err;
	printk("ov5693 63\n");
	mutex_lock(&priv->streaming_lock);
	err = ov5693_write_table(priv,
		mode_table[OV5693_MODE_STOP_STREAM]);
	if (err) {
		mutex_unlock(&priv->streaming_lock);
		goto exit;
	} else {
		priv->streaming = false;
		mutex_unlock(&priv->streaming_lock);
	}

	/*
	 * Wait for one frame to make sure sensor is set to
	 * software standby in V-blank
	 *
	 * frame_time = frame length rows * Tline
	 * Tline = line length / pixel clock (in MHz)
	 */
	frame_time = priv->frame_length *
		OV5693_DEFAULT_LINE_LENGTH / OV5693_DEFAULT_PIXEL_CLOCK;

	usleep_range(frame_time, frame_time + 1000);
	printk("ov5693 64\n");
	return 0;

exit:
	printk("ov5693 65\n");
	dev_err(dev, "%s: error stopping stream\n", __func__);
	return err;
}

static struct camera_common_sensor_ops ov5693_common_ops = {
	.numfrmfmts = ARRAY_SIZE(ov5693_frmfmt),
	.frmfmt_table = ov5693_frmfmt,
	.power_on = ov5693_power_on,
	.power_off = ov5693_power_off,
	.write_reg = ov5693_write_reg,
	.read_reg = ov5693_read_reg,
	.parse_dt = ov5693_parse_dt,
	.power_get = ov5693_power_get,
	.power_put = ov5693_power_put,
	.set_mode = ov5693_set_mode,
	.start_streaming = ov5693_start_streaming,
	.stop_streaming = ov5693_stop_streaming,
};

static int ov5693_debugfs_streaming_show(void *data, u64 *val)
{
	struct ov5693 *priv = data;
	printk("ov5693 66\n");
	mutex_lock(&priv->streaming_lock);
	*val = priv->streaming;
	mutex_unlock(&priv->streaming_lock);
	printk("ov5693 67\n");
	return 0;
}

static int ov5693_debugfs_streaming_write(void *data, u64 val)
{
	int err = 0;
	struct ov5693 *priv = data;
	struct i2c_client *client = priv->i2c_client;
	bool enable = (val != 0);
	
	int mode_index = enable ?
		(OV5693_MODE_START_STREAM) : (OV5693_MODE_STOP_STREAM);
	printk("ov5693 68\n");
	dev_info(&client->dev, "%s: %s sensor\n",
			__func__, (enable ? "enabling" : "disabling"));

	mutex_lock(&priv->streaming_lock);

	err = ov5693_write_table(priv, mode_table[mode_index]);
	if (err) {
		dev_err(&client->dev, "%s: error setting sensor streaming\n",
			__func__);
		goto done;
	}

	priv->streaming = enable;
	printk("ov5693 69\n");
done:
	printk("ov5693 69\n");
	mutex_unlock(&priv->streaming_lock);

	return err;
}

DEFINE_SIMPLE_ATTRIBUTE(ov5693_debugfs_streaming_fops,
	ov5693_debugfs_streaming_show,
	ov5693_debugfs_streaming_write,
	"%lld\n");

static void ov5693_debugfs_remove(struct ov5693 *priv);

static int ov5693_debugfs_create(struct ov5693 *priv)
{
	int err = 0;
	struct i2c_client *client = priv->i2c_client;
	const char *devnode;
	char debugfs_dir[16];
	printk("ov5693 70\n");
	err = of_property_read_string(client->dev.of_node, "devnode", &devnode);
	if (err) {
		dev_err(&client->dev, "devnode not in DT\n");
		return err;
	}
	err = snprintf(debugfs_dir, sizeof(debugfs_dir), "camera-%s", devnode);
	if (err < 0)
		return -EINVAL;

	priv->debugfs_dir = debugfs_create_dir(debugfs_dir, NULL);
	if (priv->debugfs_dir == NULL)
		return -ENOMEM;

	if (!debugfs_create_file("streaming", 0644, priv->debugfs_dir, priv,
			&ov5693_debugfs_streaming_fops))
		goto error;
	printk("ov5693 71\n");
	return 0;

error:
	printk("ov5693 72\n");
	ov5693_debugfs_remove(priv);

	return -ENOMEM;
}

static struct tegracam_ctrl_ops ov5693_ctrl_ops = {
	.numctrls = ARRAY_SIZE(ctrl_cid_list),
	.ctrl_cid_list = ctrl_cid_list,
#if 0
	.string_ctrl_size = {OV5693_EEPROM_STR_SIZE,
				OV5693_FUSE_ID_STR_SIZE,
				OV5693_OTP_STR_SIZE},
#endif
	.set_gain = ov5693_set_gain,
	.set_exposure = ov5693_set_exposure,
	.set_exposure_short = ov5693_set_exposure_short,
	.set_frame_rate = ov5693_set_frame_rate,
	.set_group_hold = ov5693_set_group_hold,
	.fill_string_ctrl = ov5693_fill_string_ctrl,
};

static int ov5693_board_setup(struct ov5693 *priv)
{
	struct camera_common_data *s_data = priv->s_data;
	struct device *dev = s_data->dev;
	bool eeprom_ctrl = 0;
	int err = 0;
	printk("ov5693 73\n");
	dev_info(dev, "%s++\n", __func__);

	/* eeprom interface */
	err = ov5693_eeprom_device_init(priv);
	if (err && s_data->pdata->has_eeprom)
		dev_err(dev,
			"Failed to allocate eeprom reg map: %d\n", err);
	eeprom_ctrl = !err;

	err = camera_common_mclk_enable(s_data);
	if (err) {
		dev_err(dev,
			"Error %d turning on mclk\n", err);
		return err;
	}

	err = ov5693_power_on(s_data);
	if (err) {
		dev_err(dev,
			"Error %d during power on sensor\n", err);
		return err;
	}

	if (eeprom_ctrl) {
		err = ov5693_read_eeprom(priv);
		if (err) {
			dev_err(dev,
				"Error %d reading eeprom\n", err);
			goto error;
		}
	}

	err = ov5693_otp_setup(priv);
	if (err) {
		dev_err(dev,
			"Error %d reading otp data\n", err);
		goto error;
	}

	err = ov5693_fuse_id_setup(priv);
	if (err) {
		dev_err(dev,
			"Error %d reading fuse id data\n", err);
		goto error;
	}
	printk("ov5693 74\n");
error:
	printk("ov5693 75\n");
	ov5693_power_off(s_data);
	camera_common_mclk_disable(s_data);
	return err;
}

static void ov5693_debugfs_remove(struct ov5693 *priv)
{
	printk("ov5693 76\n");
	debugfs_remove_recursive(priv->debugfs_dir);
	priv->debugfs_dir = NULL;
	printk("ov5693 77\n");
}

static int ov5693_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
{
	
	struct i2c_client *client = v4l2_get_subdevdata(sd);
	printk("ov5693 78\n");
	dev_info(&client->dev, "%s:\n", __func__);
	printk("ov5693 79\n");
	return 0;
}

static const struct v4l2_subdev_internal_ops ov5693_subdev_internal_ops = {
	.open = ov5693_open,
};

static int ov5693_probe(struct i2c_client *client,
			const struct i2c_device_id *id)
{
	struct device *dev = &client->dev;
	struct device_node *node = client->dev.of_node;
	struct tegracam_device *tc_dev;
	struct ov5693 *priv;
	int err;
	const struct of_device_id *match;
	int i;
	printk("ov5693 80\n");
	dev_info(dev, "probing v4l2 sensor no i2c.\n");

	match = of_match_device(ov5693_of_match, dev);
	if (!match) {
		dev_err(dev, "No device match found\n");
		return -ENODEV;
	}

	if (!IS_ENABLED(CONFIG_OF) || !node)
		return -EINVAL;

	priv = devm_kzalloc(dev,
			    sizeof(struct ov5693), GFP_KERNEL);
	if (!priv)
		return -ENOMEM;

	tc_dev = devm_kzalloc(dev,
			    sizeof(struct tegracam_device), GFP_KERNEL);
	if (!tc_dev)
		return -ENOMEM;

	priv->i2c_client = tc_dev->client = client;
	tc_dev->dev = dev;
	strncpy(tc_dev->name, "ov5693", sizeof(tc_dev->name));
	tc_dev->dev_regmap_config = &ov5693_regmap_config;
	tc_dev->sensor_ops = &ov5693_common_ops;
	tc_dev->v4l2sd_internal_ops = &ov5693_subdev_internal_ops;
	tc_dev->tcctrl_ops = &ov5693_ctrl_ops;

	err = tegracam_device_register(tc_dev);
	if (err) {
		dev_err(dev, "tegra camera driver registration failed\n");
		return err;
	}

	priv->tc_dev = tc_dev;
	priv->s_data = tc_dev->s_data;
	priv->subdev = &tc_dev->s_data->subdev;
	tegracam_set_privdata(tc_dev, (void *)priv);
	mutex_init(&priv->streaming_lock);

	err = ov5693_board_setup(priv);
	if (err) {
		tegracam_device_unregister(tc_dev);
		dev_err(dev, "board setup failed\n");
		goto fail;
	}

	err = tegracam_v4l2subdev_register(tc_dev, true);
	if (err) {
		dev_err(dev, "tegra camera subdev registration failed\n");
		goto fail;
	}

	err = ov5693_debugfs_create(priv);
	if (err) {
		dev_err(dev, "error creating debugfs interface");
		ov5693_debugfs_remove(priv);
		goto fail;
	}

	dev_info(dev, "Detected OV5693 sensor\n");
	printk("ov5693 81\n");
	return 0;

fail:
	printk("ov5693 82\n");
	for (i = 0; i < OV5693_EEPROM_NUM_BLOCKS; i++) {
		if (priv->eeprom[i].i2c_client != NULL) {
			i2c_unregister_device(priv->eeprom[i].i2c_client);
			priv->eeprom[i].i2c_client = NULL;
		}
	}
	printk("ov5693 83\n");
	return err;
}

static int
ov5693_remove(struct i2c_client *client)
{
	struct camera_common_data *s_data = to_camera_common_data(&client->dev);
	struct ov5693 *priv = (struct ov5693 *)s_data->priv;
	printk("ov5693 84\n");
	ov5693_debugfs_remove(priv);

	tegracam_v4l2subdev_unregister(priv->tc_dev);
	ov5693_power_put(priv->tc_dev);
	tegracam_device_unregister(priv->tc_dev);
	ov5693_eeprom_device_release(priv);

	mutex_destroy(&priv->streaming_lock);
	printk("ov5693 85\n");
	return 0;
}

static const struct i2c_device_id ov5693_id[] = {
	{ "ov5693", 0 },
	{ }
};

MODULE_DEVICE_TABLE(i2c, ov5693_id);

static struct i2c_driver ov5693_i2c_driver = {
	.driver = {
		.name = "ov5693",
		.owner = THIS_MODULE,
		.of_match_table = of_match_ptr(ov5693_of_match),
	},
	.probe = ov5693_probe,
	.remove = ov5693_remove,
	.id_table = ov5693_id,
};
module_i2c_driver(ov5693_i2c_driver);

MODULE_DESCRIPTION("Media Controller driver for OmniVision OV5693");
MODULE_AUTHOR("NVIDIA Corporation");
MODULE_LICENSE("GPL v2");

5-)Edit ov5693_mode_tbls.h
My image size are 1280x720. I put these size in to code

#ifndef __OV5693_TABLES__
#define __OV5693_TABLES__

#include <media/camera_common.h>

#define OV5693_TABLE_WAIT_MS	0
#define OV5693_TABLE_END	1
#define OV5693_MAX_RETRIES	3
#define OV5693_WAIT_MS		10

#define ov5693_reg struct reg_8

static const ov5693_reg ov5693_start[] = {
	{0x0100, 0x01}, /* mode select streaming on */
	{OV5693_TABLE_END, 0x00}
};

static const ov5693_reg ov5693_stop[] = {
	{0x0100, 0x00}, /* mode select streaming on */
	{OV5693_TABLE_END, 0x00}
};

static const ov5693_reg tp_colorbars[] = {
	{0x0600, 0x00},
	{0x0601, 0x02},

	{OV5693_TABLE_WAIT_MS, OV5693_WAIT_MS},
	{OV5693_TABLE_END, 0x00}
};

static const ov5693_reg mode_2592x1944[] = {
	{OV5693_TABLE_WAIT_MS, OV5693_WAIT_MS},
	{OV5693_TABLE_END, 0x0000}
};

enum {
	OV5693_MODE_2592X1944,

	OV5693_MODE_START_STREAM,
	OV5693_MODE_STOP_STREAM,
	OV5693_MODE_TEST_PATTERN
};

static const ov5693_reg *mode_table[] = {
	[OV5693_MODE_2592X1944]			= mode_2592x1944,

	[OV5693_MODE_START_STREAM]		= ov5693_start,
	[OV5693_MODE_STOP_STREAM]		= ov5693_stop,
	[OV5693_MODE_TEST_PATTERN]		= tp_colorbars,
};

static const int ov5693_30fps[] = {
	60,
};

static const struct camera_common_frmfmt ov5693_frmfmt[] = {
	{{1280, 720},	ov5693_30fps,	1, 0,	OV5693_MODE_2592X1944},
};
#endif  /* __OV5693_TABLES__ */

I builded my kernel with Kernel Customization — Jetson Linux Developer Guide documentation . I change dtb files, Image file and nv_ov5693.ko files with upload image.

sudo ./apply_binaries.sh

and

sudo ./flash.sh jetson-agx-xavier-industrial mmcblk0p1

I used nv_ov5693 driver with module .

My nv_ov5693 dmesg output:

root@tegra-ubuntu:/home# dmesg | grep ov5693
[  811.320804] ov5693 80
[  811.320823] ov5693 2-0036: probing v4l2 sensor no i2c.
[  811.320920] ov5693 55
[  811.320929] ov5693 2-0036: ov5693_parse_dt:akl entry
[  811.320942] ov5693 2-0036: ov5693_parse_dt:akl exit
[  811.320948] ov5693 56
[  811.320953] ov5693 22
[  811.320959] ov5693 23
[  811.321077] ov5693 2-0036: tegracam sensor driver:ov5693_v2.0.6
[  811.321085] ov5693 73
[  811.321092] ov5693 2-0036: ov5693_board_setup++
[  811.321097] ov5693 43
[  811.321140] ov5693 44
[  811.321153] ov5693 16
[  811.321158] ov5693 17
[  811.321164] ov5693 45
[  811.321169] ov5693 46
[  811.321174] ov5693 49
[  811.321179] ov5693 47
[  811.332250] ov5693 14
[  811.332258] ov5693 15
[  811.332264] ov5693 12
[  811.332269] ov5693 13
[  811.332274] ov5693 12
[  811.332309] ov5693 13
[  811.343347] ov5693 14
[  811.343354] ov5693 15
[  811.343360] ov5693 48
[  811.343365] ov5693 47
[  811.354399] ov5693 14
[  811.354438] ov5693 15
[  811.354444] ov5693 12
[  811.354449] ov5693 13
[  811.354454] ov5693 12
[  811.354459] ov5693 13
[  811.365499] ov5693 14
[  811.365507] ov5693 15
[  811.365519] ov5693 48
[  811.365552] ov5693 47
[  811.376589] ov5693 14
[  811.376597] ov5693 15
[  811.376603] ov5693 12
[  811.376608] ov5693 13
[  811.376613] ov5693 12
[  811.376643] ov5693 13
[  811.387680] ov5693 14
[  811.387687] ov5693 15
[  811.387693] ov5693 48
[  811.387698] ov5693 47
[  811.398734] ov5693 14
[  811.398765] ov5693 15
[  811.398771] ov5693 12
[  811.398776] ov5693 13
[  811.398781] ov5693 12
[  811.398786] ov5693 13
[  811.409825] ov5693 14
[  811.409833] ov5693 15
[  811.409868] ov5693 48
[  811.409873] ov5693 47
[  811.420912] ov5693 14
[  811.420919] ov5693 15
[  811.420925] ov5693 12
[  811.420930] ov5693 13
[  811.420935] ov5693 12
[  811.420968] ov5693 13
[  811.432007] ov5693 14
[  811.432014] ov5693 15
[  811.432020] ov5693 48
[  811.432025] ov5693 47
[  811.443064] ov5693 14
[  811.443100] ov5693 15
[  811.443105] ov5693 12
[  811.443111] ov5693 13
[  811.443116] ov5693 12
[  811.443121] ov5693 13
[  811.454156] ov5693 14
[  811.454164] ov5693 15
[  811.454194] ov5693 48
[  811.454200] ov5693 47
[  811.465236] ov5693 14
[  811.465244] ov5693 15
[  811.465249] ov5693 12
[  811.465255] ov5693 13
[  811.465284] ov5693 12
[  811.465289] ov5693 13
[  811.476324] ov5693 14
[  811.476332] ov5693 15
[  811.476337] ov5693 48
[  811.476342] ov5693 47
[  811.487405] ov5693 14
[  811.487412] ov5693 15
[  811.487418] ov5693 12
[  811.487423] ov5693 13
[  811.487428] ov5693 12
[  811.487433] ov5693 13
[  811.498499] ov5693 14
[  811.498507] ov5693 15
[  811.498512] ov5693 48
[  811.498518] ov5693 47
[  811.509556] ov5693 14
[  811.509564] ov5693 15
[  811.509569] ov5693 12
[  811.509574] ov5693 13
[  811.509605] ov5693 12
[  811.509610] ov5693 13
[  811.520649] ov5693 14
[  811.520657] ov5693 15
[  811.520663] ov5693 48
[  811.520668] ov5693 47
[  811.531733] ov5693 14
[  811.531741] ov5693 15
[  811.531747] ov5693 12
[  811.531752] ov5693 13
[  811.531757] ov5693 12
[  811.531762] ov5693 13
[  811.542797] ov5693 14
[  811.542836] ov5693 15
[  811.542842] ov5693 48
[  811.542847] ov5693 47
[  811.553891] ov5693 14
[  811.553900] ov5693 15
[  811.553906] ov5693 12
[  811.553937] ov5693 13
[  811.553942] ov5693 12
[  811.553947] ov5693 13
[  811.564984] ov5693 14
[  811.564991] ov5693 15
[  811.564997] ov5693 48
[  811.565002] ov5693 47
[  811.576043] ov5693 14
[  811.576051] ov5693 15
[  811.576057] ov5693 12
[  811.576063] ov5693 13
[  811.576068] ov5693 12
[  811.576073] ov5693 13
[  811.587160] ov5693 14
[  811.587169] ov5693 15
[  811.587175] ov5693 48
[  811.587181] ov5693 47
[  811.598217] ov5693 14
[  811.598225] ov5693 15
[  811.598230] ov5693 12
[  811.598264] ov5693 13
[  811.598269] ov5693 12
[  811.598274] ov5693 13
[  811.609311] ov5693 14
[  811.609319] ov5693 15
[  811.609324] ov5693 48
[  811.609363] ov5693 47
[  811.620344] ov5693 14
[  811.620354] ov5693 15
[  811.620360] ov5693 12
[  811.620365] ov5693 13
[  811.620409] ov5693 12
[  811.620415] ov5693 13
[  811.631454] ov5693 14
[  811.631462] ov5693 15
[  811.631467] ov5693 48
[  811.631473] ov5693 47
[  811.642537] ov5693 14
[  811.642545] ov5693 15
[  811.642551] ov5693 12
[  811.642556] ov5693 13
[  811.642561] ov5693 12
[  811.642566] ov5693 13
[  811.653634] ov5693 14
[  811.653641] ov5693 15
[  811.653647] ov5693 48
[  811.653652] ov5693 47
[  811.664715] ov5693 14
[  811.664723] ov5693 15
[  811.664728] ov5693 12
[  811.664734] ov5693 13
[  811.664739] ov5693 12
[  811.664744] ov5693 13
[  811.675781] ov5693 14
[  811.675788] ov5693 15
[  811.675794] ov5693 48
[  811.675799] ov5693 47
[  811.686834] ov5693 14
[  811.686841] ov5693 15
[  811.686847] ov5693 12
[  811.686852] ov5693 13
[  811.686857] ov5693 12
[  811.686862] ov5693 13
[  811.697928] ov5693 14
[  811.697936] ov5693 15
[  811.697941] ov5693 48
[  811.697947] ov5693 47
[  811.708984] ov5693 14
[  811.708992] ov5693 15
[  811.708998] ov5693 12
[  811.709004] ov5693 13
[  811.709009] ov5693 12
[  811.709044] ov5693 13
[  811.720081] ov5693 14
[  811.720088] ov5693 15
[  811.720105] ov5693 48
[  811.720110] ov5693 47
[  811.731144] ov5693 14
[  811.731152] ov5693 15
[  811.731158] ov5693 12
[  811.731163] ov5693 13
[  811.731168] ov5693 12
[  811.731205] ov5693 13
[  811.742242] ov5693 14
[  811.742249] ov5693 15
[  811.742255] ov5693 48
[  811.742260] ov5693 47
[  811.753304] ov5693 14
[  811.753313] ov5693 15
[  811.753319] ov5693 12
[  811.753325] ov5693 13
[  811.753330] ov5693 12
[  811.753370] ov5693 13
[  811.764407] ov5693 14
[  811.764415] ov5693 15
[  811.764421] ov5693 48
[  811.764426] ov5693 47
[  811.775464] ov5693 14
[  811.775472] ov5693 15
[  811.775478] ov5693 12
[  811.775483] ov5693 13
[  811.775488] ov5693 12
[  811.775493] ov5693 13
[  811.786562] ov5693 14
[  811.786570] ov5693 15
[  811.786575] ov5693 48
[  811.786581] ov5693 47
[  811.797619] ov5693 14
[  811.797627] ov5693 15
[  811.797634] ov5693 12
[  811.797639] ov5693 13
[  811.797644] ov5693 12
[  811.797679] ov5693 13
[  811.808716] ov5693 14
[  811.808724] ov5693 15
[  811.808730] ov5693 48
[  811.808735] ov5693 47
[  811.819773] ov5693 14
[  811.819781] ov5693 15
[  811.819787] ov5693 12
[  811.819792] ov5693 13
[  811.819797] ov5693 12
[  811.819802] ov5693 13
[  811.830868] ov5693 14
[  811.830875] ov5693 15
[  811.830881] ov5693 48
[  811.830886] ov5693 47
[  811.841922] ov5693 14
[  811.841930] ov5693 15
[  811.841936] ov5693 12
[  811.841941] ov5693 13
[  811.841946] ov5693 12
[  811.841978] ov5693 13
[  811.852257] ov5693 14
[  811.852265] ov5693 15
[  811.852271] ov5693 48
[  811.852276] ov5693 47
[  811.863340] ov5693 14
[  811.863349] ov5693 15
[  811.863355] ov5693 12
[  811.863360] ov5693 13
[  811.863365] ov5693 12
[  811.863370] ov5693 13
[  811.874406] ov5693 14
[  811.874443] ov5693 15
[  811.874449] ov5693 48
[  811.874455] ov5693 47
[  811.885489] ov5693 14
[  811.885496] ov5693 15
[  811.885502] ov5693 12
[  811.885507] ov5693 13
[  811.885539] ov5693 12
[  811.885544] ov5693 13
[  811.896579] ov5693 14
[  811.896587] ov5693 15
[  811.896592] ov5693 48
[  811.896598] ov5693 47
[  811.907660] ov5693 14
[  811.907668] ov5693 15
[  811.907673] ov5693 12
[  811.907678] ov5693 13
[  811.907683] ov5693 12
[  811.907688] ov5693 13
[  811.918726] ov5693 14
[  811.918733] ov5693 15
[  811.918739] ov5693 48
[  811.918744] ov5693 47
[  811.929779] ov5693 14
[  811.929816] ov5693 15
[  811.929822] ov5693 12
[  811.929827] ov5693 13
[  811.929832] ov5693 12
[  811.929837] ov5693 13
[  811.940872] ov5693 14
[  811.940880] ov5693 15
[  811.940914] ov5693 48
[  811.940919] ov5693 47
[  811.951954] ov5693 14
[  811.951962] ov5693 15
[  811.951967] ov5693 12
[  811.951973] ov5693 13
[  811.951978] ov5693 12
[  811.952008] ov5693 13
[  811.963047] ov5693 14
[  811.963054] ov5693 15
[  811.963060] ov5693 48
[  811.963065] ov5693 47
[  811.974100] ov5693 14
[  811.974107] ov5693 15
[  811.974148] ov5693 12
[  811.974154] ov5693 13
[  811.974159] ov5693 12
[  811.974164] ov5693 13
[  811.985199] ov5693 14
[  811.985207] ov5693 15
[  811.985238] ov5693 48
[  811.985244] ov5693 47
[  811.996281] ov5693 14
[  811.996289] ov5693 15
[  811.996296] ov5693 12
[  811.996301] ov5693 13
[  811.996306] ov5693 12
[  811.996311] ov5693 13
[  812.007374] ov5693 14
[  812.007382] ov5693 15
[  812.007387] ov5693 48
[  812.007393] ov5693 47
[  812.018428] ov5693 14
[  812.018435] ov5693 15
[  812.018471] ov5693 12
[  812.018479] ov5693 13
[  812.018484] ov5693 12
[  812.018488] ov5693 13
[  812.029524] ov5693 14
[  812.029531] ov5693 15
[  812.029536] ov5693 48
[  812.029541] ov5693 50
[  812.029546] ov5693 51
[  812.029576] ov5693 52
[  812.029580] ov5693 47
[  812.040617] ov5693 14
[  812.040624] ov5693 15
[  812.040629] ov5693 12
[  812.040634] ov5693 13
[  812.040638] ov5693 12
[  812.040643] ov5693 13
[  812.051681] ov5693 14
[  812.051688] ov5693 15
[  812.051693] ov5693 48
[  812.051697] ov5693 53
[  812.051702] ov5693 54
[  812.051707] ov5693 74
[  812.051762] ov5693 75
[  812.051768] ov5693 18
[  812.051773] ov5693 19
[  812.051892] ov5693 70
[  812.051943] ov5693 71
[  812.051982] ov5693 2-0036: Detected OV5693 sensor
[  812.051988] ov5693 81

During the debugging phase, I used numbers. The FPGA initiated the stream before the driver started. Although the "Detected OV5693 sensor”, there isn’t any video device visible in /dev.

When I tried to enable and get trace data:

boost clock:

echo 1 > /sys/kernel/debug/bpmp/debug/clk/vi/mrq_rate_locked
echo 1 > /sys/kernel/debug/bpmp/debug/clk/isp/mrq_rate_locked
echo 1 > /sys/kernel/debug/bpmp/debug/clk/nvcsi/mrq_rate_locked
cat /sys/kernel/debug/bpmp/debug/clk/vi/max_rate |tee /sys/kernel/debug/bpmp/debug/clk/vi/rate
cat /sys/kernel/debug/bpmp/debug/clk/isp/max_rate | tee  /sys/kernel/debug/bpmp/debug/clk/isp/rate
cat /sys/kernel/debug/bpmp/debug/clk/nvcsi/max_rate | tee /sys/kernel/debug/bpmp/debug/clk/nvcsi/rate

enable trace for information:

echo 1 > /sys/kernel/debug/tracing/tracing_on
echo 30720 > /sys/kernel/debug/tracing/buffer_size_kb
echo 1 > /sys/kernel/debug/tracing/events/tegra_rtcpu/enable
echo 1 > /sys/kernel/debug/tracing/events/freertos/enable
echo 2 > /sys/kernel/debug/camrtc/log-level
echo 1 > /sys/kernel/debug/tracing/events/camera_common/enable
echo > /sys/kernel/debug/tracing/trace
cat /sys/kernel/debug/tracing/trace

output:

root@tegra-ubuntu:/home# cat /sys/kernel/debug/tracing/trace
# tracer: nop
#
# entries-in-buffer/entries-written: 0/0   #P:8
#
#                                _-----=> irqs-off
#                               / _----=> need-resched
#                              | / _---=> hardirq/softirq
#                              || / _--=> preempt-depth
#                              ||| /     delay
#           TASK-PID     CPU#  ||||   TIMESTAMP  FUNCTION
#              | |         |   ||||      |         |

Nothing in trace.
The main problem is that /dev/videoX does not appear.
If there are any mistakes or any advice for me, how can I solve these problems?

Thanks

Maybe keep the original device tree(for ov5693) to check if the /dev/video* was generated or not then to figure out it.

Thanks

Hi @ShaneCCC , thank you for your quick response. Does the original device tree for ov5693 refer to the “tegra194-camera-e3326-a00.dtsi” file? If yes, should I use the “tegra194-camera-e3326-a00.dtsi” file in the Linux kernel source file? Do I need to make any changes to the original dtsi file? For example, port numbers, CSI lane numbers, etc.

thanks

Hi @ShaneCCC, I tried the original “tegra194-camera-e3326-a00.dtsi” file and made a small modification to it. The edited file looks like this:

/*
 * Copyright (c) 2015-2020, NVIDIA CORPORATION.  All rights reserved.
 *
 * This program is free software; you can redistribute it and/or modify it
 * under the terms and conditions of the GNU General Public License,
 * version 2, as published by the Free Software Foundation.
 *
 * This program is distributed in the hope it will be useful, but WITHOUT
 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
 * more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program.  If not, see <http://www.gnu.org/licenses/>.
 */

/ {
	tegra-capture-vi {
		status = "okay";
		num-channels = <1>;
		ports {
			status = "okay";
			#address-cells = <1>;
			#size-cells = <0>;
			port@0 {
				status = "okay";
				reg = <0>;
				e3326_vi_in0: endpoint {
					status = "okay";
					port-index = <2>;
					bus-width = <1>;
					remote-endpoint = <&e3326_csi_out0>;
				};
			};
		};
	};

	host1x@13e00000 {
		status = "okay";
		nvcsi@15a00000 {
			status = "okay";
			num-channels = <1>;
			#address-cells = <1>;
			#size-cells = <0>;
			channel@0 {
				status = "okay";
				reg = <0>;
				ports {
					status = "okay";
					#address-cells = <1>;
					#size-cells = <0>;
					port@0 {
						status = "okay";
						reg = <0>;
						e3326_csi_in0: endpoint@0 {
							status = "okay";
							port-index = <2>;
							bus-width = <1>;
							remote-endpoint = <&e3326_ov5693_out0>;
						};
					};
					port@1 {
						status = "okay";
						reg = <1>;
						e3326_csi_out0: endpoint@1 {
							status = "okay";
							remote-endpoint = <&e3326_vi_in0>;
						};
					};
				};
			};
		};
	};

	i2c@3180000 {
		status = "okay";
		ov5693_c@36 {
			status = "okay";
			compatible = "nvidia,ov5693";
			/* I2C device address */
			reg = <0x36>;

			/* V4L2 device node location */
			devnode = "video0";

			/* Physical dimensions of sensor */
			physical_w = "3.674";
			physical_h = "2.738";

			/* Define any required hw resources needed by driver */
			/* ie. clocks, io pins, power sources */
			avdd-reg = "vana";
			iovdd-reg = "vif";

			/* Sensor output flip settings */
			vertical-flip = "true";

			/* Enable EEPROM support */
			//has-eeprom = "1";

			/**
			* A modeX node is required to support v4l2 driver
			* implementation with NVIDIA camera software stack
			*
			* mclk_khz = "";
			* Standard MIPI driving clock, typically 24MHz
			*
			* num_lanes = "";
			* Number of lane channels sensor is programmed to output
			*
			* tegra_sinterface = "";
			* The base tegra serial interface lanes are connected to
			* Incase of virtual HW devices, use virtual
			* For SW emulated devices, use host
			*
			* phy_mode = "";
			* PHY mode used by the MIPI lanes for this device
			*
			* discontinuous_clk = "";
			* The sensor is programmed to use a discontinuous clock on MIPI lanes
			*
			* dpcm_enable = "true";
			* The sensor is programmed to use a DPCM modes
			*
			* cil_settletime = "";
			* MIPI lane settle time value.
			* A "0" value attempts to autocalibrate based on mclk_multiplier
			*
			*
			*
			*
			* active_w = "";
			* Pixel active region width
			*
			* active_h = "";
			* Pixel active region height
			*
			* pixel_t = "";
			* The sensor readout pixel pattern
			*
			* readout_orientation = "0";
			* Based on camera module orientation.
			* Only change readout_orientation if you specifically
			* Program a different readout order for this mode
			*
			* line_length = "";
			* Pixel line length (width) for sensor mode.
			* This is used to calibrate features in our camera stack.
			*
			* mclk_multiplier = "";
			* Multiplier to MCLK to help time hardware capture sequence
			* TODO: Assign to PLL_Multiplier as well until fixed in core
			*
			* pix_clk_hz = "";
			* Sensor pixel clock used for calculations like exposure and framerate
			*
			*
			*
			*
			* inherent_gain = "";
			* Gain obtained inherently from mode (ie. pixel binning)
			*
			* == Source Control Settings ==
			*
			* Gain factor used to convert fixed point integer to float
			* Gain range [min_gain/gain_factor, max_gain/gain_factor]
			* Gain step [step_gain/gain_factor is the smallest step that can be configured]
			* Default gain [Default gain to be initialized for the control.
			*     use min_gain_val as default for optimal results]
			* Framerate factor used to convert fixed point integer to float
			* Framerate range [min_framerate/framerate_factor, max_framerate/framerate_factor]
			* Framerate step [step_framerate/framerate_factor is the smallest step that can be configured]
			* Default Framerate [Default framerate to be initialized for the control.
			*     use max_framerate to get required performance]
			* Exposure factor used to convert fixed point integer to float
			* For convenience use 1 sec = 1000000us as conversion factor
			* Exposure range [min_exp_time/exposure_factor, max_exp_time/exposure_factor]
			* Exposure step [step_exp_time/exposure_factor is the smallest step that can be configured]
			* Default Exposure Time [Default exposure to be initialized for the control.
			*     Set default exposure based on the default_framerate for optimal exposure settings]
			*
			* gain_factor = ""; (integer factor used for floating to fixed point conversion)
			* min_gain_val = ""; (ceil to integer)
			* max_gain_val = ""; (ceil to integer)
			* step_gain_val = ""; (ceil to integer)
			* default_gain = ""; (ceil to integer)
			* Gain limits for mode
			*
			* exposure_factor = ""; (integer factor used for floating to fixed point conversion)
			* min_exp_time = ""; (ceil to integer)
			* max_exp_time = ""; (ceil to integer)
			* step_exp_time = ""; (ceil to integer)
			* default_exp_time = ""; (ceil to integer)
			* Exposure Time limits for mode (us)
			*
			*
			* min_hdr_ratio = "";
			* max_hdr_ratio = "";
			* HDR Ratio limits for mode
			*
			* framerate_factor = ""; (integer factor used for floating to fixed point conversion)
			* min_framerate = "";
			* max_framerate = "";
			* step_framerate = ""; (ceil to integer)
			* default_framerate = ""; (ceil to integer)
			* Framerate limits for mode (fps)
			*/
			mode0 { // OV5693_MODE_2592X1944
				status = "okay";
				mclk_khz = "24000";
				num_lanes = "1";
				tegra_sinterface = "serial_c";
				phy_mode = "DPHY";
				discontinuous_clk = "yes";
				dpcm_enable = "false";
				cil_settletime = "0";
				lane_polarity = "0";
				active_w = "1280";
				active_h = "720";
				mode_type = "rgb";
				pixel_phase = "rgb888";
				csi_pixel_bit_depth = "24";
				readout_orientation = "0";
				line_length = "1752";
				inherent_gain = "1";
				mclk_multiplier = "6.67";
				pix_clk_hz = "160000000";

				gain_factor = "10";
				min_gain_val = "10";/* 1DB*/
				max_gain_val = "160";/* 16DB*/
				step_gain_val = "1";
				default_gain = "10";
				min_hdr_ratio = "1";
				max_hdr_ratio = "1";
				framerate_factor = "1000000";
				min_framerate = "2787078";/* 2.787078 */
				max_framerate = "120000000";/* 120*/
				step_framerate = "1";
				default_framerate = "120000000";
				exposure_factor = "1000000";
				min_exp_time = "22";/* us */
				max_exp_time = "358733";/* us */
				step_exp_time = "1";
				default_exp_time = "8334";/* us */
				embedded_metadata_height = "0";
			};

			//mode1 { //OV5693_MODE_2592X1458
			//	mclk_khz = "24000";
			//	num_lanes = "2";
			//	tegra_sinterface = "serial_c";
			//	phy_mode = "DPHY";
			//	discontinuous_clk = "yes";
			//	dpcm_enable = "false";
			//	cil_settletime = "0";
//
			//	active_w = "2592";
			//	active_h = "1458";
			//	mode_type = "bayer";
			//	pixel_phase = "bggr";
			//	csi_pixel_bit_depth = "10";
			//	readout_orientation = "0";
			//	line_length = "2688";
			//	inherent_gain = "1";
			//	mclk_multiplier = "6.67";
			//	pix_clk_hz = "160000000";

			//	gain_factor = "10";
			//	min_gain_val = "10";/* 1DB*/
			//	max_gain_val = "160";/* 16DB*/
			//	step_gain_val = "1";
			//	default_gain = "10";
			//	min_hdr_ratio = "1";
			//	max_hdr_ratio = "1";
			//	framerate_factor = "1000000";
			//	min_framerate = "1816577";/*1.816577 */
			//	max_framerate = "30000000";/*30*/
			//	step_framerate = "1";
			//	default_framerate = "30000000";
			//	exposure_factor = "1000000";
			//	min_exp_time = "34";/* us */
			//	max_exp_time = "550385";/* us */
			//	step_exp_time = "1";
			//	default_exp_time = "33334";/* us */
			//	embedded_metadata_height = "0";
			//};

			//mode2 { //OV5693_MODE_1280X720
			//	mclk_khz = "24000";
			//	num_lanes = "2";
			//	tegra_sinterface = "serial_c";
			//	phy_mode = "DPHY";
			//	discontinuous_clk = "yes";
			//	dpcm_enable = "false";
			//	cil_settletime = "0";
//
			//	active_w = "1280";
			//	active_h = "720";
			//	mode_type = "bayer";
			//	pixel_phase = "bggr";
			//	csi_pixel_bit_depth = "10";
			//	readout_orientation = "0";
			//	line_length = "1752";
			//	inherent_gain = "1";
			//	mclk_multiplier = "6.67";
			//	pix_clk_hz = "160000000";

			//	gain_factor = "10";
			//	min_gain_val = "10";/* 1DB*/
			//	max_gain_val = "160";/* 16DB*/
			//	step_gain_val = "1";
			//	default_gain = "10";
			//	min_hdr_ratio = "1";
			//	max_hdr_ratio = "1";
			//	framerate_factor = "1000000";
			//	min_framerate = "2787078";/* 2.787078 */
			//	max_framerate = "120000000";/* 120*/
			//	step_framerate = "1";
			//	default_framerate = "120000000";
			//	exposure_factor = "1000000";
			//	min_exp_time = "22";/* us */
			//	max_exp_time = "358733";/* us */
			//	step_exp_time = "1";
			//	default_exp_time = "8334";/* us */
			//	embedded_metadata_height = "0";
			//};

			ports {
				status = "okay";
				#address-cells = <1>;
				#size-cells = <0>;

				port@0 {
					status = "okay";
					reg = <0>;
					e3326_ov5693_out0: endpoint {
						status = "okay";
						port-index = <2>;
						bus-width = <1>;
						remote-endpoint = <&e3326_csi_in0>;
					};
				};
			};
		};
	};

	e3326_lens_ov5693@P5V27C {
		status = "okay";
		min_focus_distance = "0.0";
		hyper_focal = "0.0";
		focal_length = "2.67";
		f_number = "2.0";
		aperture = "2.0";
	};

	tegra-camera-platform {
		status = "okay";
		compatible = "nvidia, tegra-camera-platform";
		/**
		* Physical settings to calculate max ISO BW
		*
		* num_csi_lanes = <>;
		* Total number of CSI lanes when all cameras are active
		*
		* max_lane_speed = <>;
		* Max lane speed in Kbit/s
		*
		* min_bits_per_pixel = <>;
		* Min bits per pixel
		*
		* vi_peak_byte_per_pixel = <>;
		* Max byte per pixel for the VI ISO case
		*
		* vi_bw_margin_pct = <>;
		* Vi bandwidth margin in percentage
		*
		* max_pixel_rate = <>;
		* Max pixel rate in Kpixel/s for the ISP ISO case
		*
		* isp_peak_byte_per_pixel = <>;
		* Max byte per pixel for the ISP ISO case
		*
		* isp_bw_margin_pct = <>;
		* Isp bandwidth margin in percentage
		*/
		num_csi_lanes = <1>;
		max_lane_speed = <1500000>;
		min_bits_per_pixel = <8>;
		vi_peak_byte_per_pixel = <5>;
		vi_bw_margin_pct = <25>;
		max_pixel_rate = <160000>;
		isp_peak_byte_per_pixel = <5>;
		isp_bw_margin_pct = <25>;

		/**
		* The general guideline for naming badge_info contains 3 parts, and is as follows,
		* The first part is the camera_board_id for the module; if the module is in a FFD
		* platform, then use the platform name for this part.
		* The second part contains the position of the module, ex. “rear” or “front”.
		* The third part contains the last 6 characters of a part number which is found
		* in the module's specsheet from the vender.
		*/
		modules {
			status = "okay";
			module0 {
				status = "okay";
				badge = "e3326_front_P5V27C";
				position = "rear";
				orientation = "1";
				drivernode0 {
					status = "okay";
					/* Declare PCL support driver (classically known as guid)  */
					pcl_id = "v4l2_sensor";
					/* Driver v4l2 device name */
					devname = "ov5693 2-0036";
					/* Declare the device-tree hierarchy to driver instance */
					proc-device-tree = "/proc/device-tree/i2c@3180000/ov5693_c@36";
				};
				
				drivernode1 {
					/* Declare PCL support driver (classically known as guid)  */				status = "okay";
					pcl_id = "v4l2_lens";
					proc-device-tree = "/proc/device-tree/e3326_lens_ov5693@P5V27C/";
				};
			};
		};
	};
};

I have /dev/video0 finally . When I tried v4l2-ctl --device /dev/video0 --list-formats-ext , the response was:

Type: Video Capture

        [0]: 'AB24' (32-bit RGBA 8-8-8-8)
                Size: Discrete 1280x720
                        Interval: Discrete 0.017s (60.000 fps)

I sent RGB format data to the AGX Xavier Industrial SoM from the FPGA. When I tried to save raw data from CSI using v4l2-ctl -d /dev/video0 --set-ctrl bypass_mode=0 --stream-mmap --stream-count=1 --stream-to=test6.raw --verbose , the response was:

VIDIOC_QUERYCAP: ok
VIDIOC_S_EXT_CTRLS: ok
                VIDIOC_REQBUFS returned 0 (Success)
                VIDIOC_QUERYBUF returned 0 (Success)
                VIDIOC_QUERYBUF returned 0 (Success)
                VIDIOC_QUERYBUF returned 0 (Success)
                VIDIOC_QUERYBUF returned 0 (Success)
                VIDIOC_QBUF returned 0 (Success)
                VIDIOC_QBUF returned 0 (Success)
                VIDIOC_QBUF returned 0 (Success)
                VIDIOC_QBUF returned 0 (Success)
                VIDIOC_STREAMON returned 0 (Success)
[  644.318873] tegra-camrtc-capture-vi tegra-capture-vi: uncorr_err: request timed out after 2500 ms
cap dqbuf: 0 seq:      0 bytesused: 3686400 ts: 0.000000 (error, ts-monotonic, ts-src-eof)
[  644.321377] tegra-camrtc-capture-vi tegra-capture-vi: err_rec: attempting to reset the capture channel
cap dqbuf: 0 seq:      0 bytesused: 3686400 ts: 0.000000 (error, ts-monotonic, ts-src-eof)
cap dqbuf: 1 seq:      1 bytesused: 3686400 ts: 0.000000 (error, ts-monotonic, ts-src-eof)
cap dqbuf: 2 seq:      2 bytesused: 3686400 ts: 0.000000 (error, ts-monotonic, ts-src-eof)
cap dqbuf: 3 seq:      3 bytesused: 3686400 ts: 0.000000 (error, ts-monotonic, ts-src-eof)
[  644.324707] (NULL device *): vi_capture_control_message: NULL VI channel received
[  644.327258] t194-nvcsi 13e10000.host1x:nvcsi@15a00000: csi5_stream_close: Error in closing stream_id=2, csi_port=2
[  644.329778] (NULL device *): vi_capture_control_message: NULL VI channel received
[  644.332319] t194-nvcsi 13e10000.host1x:nvcsi@15a00000: csi5_stream_open: VI channel not found for stream- 2 vc- 0
[  644.335140] tegra-camrtc-capture-vi tegra-capture-vi: err_rec: successfully reset the capture channel
[  646.878929] tegra-camrtc-capture-vi tegra-capture-vi: uncorr_err: request timed out after 2500 ms
cap dqbuf: 0 seq:      0 bytesused: 3686400 ts: 0.000000 (error, ts-monotonic, ts-src-eof)
[  646.881443] tegra-camrtc-capture-vi tegra-capture-vi: err_rec: attempting to reset the capture channel
cap dqbuf: 0 seq:      0 bytesused: 3686400 ts: 0.000000 (error, ts-monotonic, ts-src-eof)
cap dqbuf: 1 seq:      1 bytesused: 3686400 ts: 0.000000 (error, ts-monotonic, ts-src-eof)
cap dqbuf: 2 seq:      2 bytesused: 3686400 ts: 0.000000 (error, ts-monotonic, ts-src-eof)
cap dqbuf: 3 seq:      3 bytesused: 3686400 ts: 0.000000 (error, ts-monotonic, ts-src-eof)
[  646.884729] (NULL device *): vi_capture_control_message: NULL VI channel received
[  646.887149] t194-nvcsi 13e10000.host1x:nvcsi@15a00000: csi5_stream_close: Error in closing stream_id=2, csi_port=2

My trace result was:

entries-in-buffer/entries-written: 51/51   #P:8
#
#                                _-----=> irqs-off
#                               / _----=> need-resched
#                              | / _---=> hardirq/softirq
#                              || / _--=> preempt-depth
#                              ||| /     delay
#           TASK-PID     CPU#  ||||   TIMESTAMP  FUNCTION
#              | |         |   ||||      |         |
     kworker/0:0-1575    [000] ....   628.066861: rtcpu_string: tstamp:20959795184 id:0x04010000 str:"VM0 deactivating."
        v4l2-ctl-1577    [003] ....   641.626720: tegra_channel_open: vi-output, ov5693 2-0036
        v4l2-ctl-1577    [003] ....   641.636915: tegra_channel_set_power: ov5693 2-0036 : 0x1
        v4l2-ctl-1577    [003] ....   641.636933: camera_common_s_power: status : 0x1
        v4l2-ctl-1577    [003] ....   641.636981: tegra_channel_set_power: 13e10000.host1x:nvcsi@15a00000- : 0x1
        v4l2-ctl-1577    [003] ....   641.636984: csi_s_power: enable : 0x1
        v4l2-ctl-1577    [003] ....   641.637675: tegra_channel_capture_setup: vnc_id 0 W 1280 H 720 fmt 9
        v4l2-ctl-1577    [003] ....   641.645011: tegra_channel_set_stream: enable : 0x1
        v4l2-ctl-1577    [003] ....   641.646271: tegra_channel_set_stream: 13e10000.host1x:nvcsi@15a00000- : 0x1
        v4l2-ctl-1577    [003] ....   641.646274: csi_s_stream: enable : 0x1
        v4l2-ctl-1577    [003] ....   641.646744: tegra_channel_set_stream: ov5693 2-0036 : 0x1
     kworker/0:0-1575    [000] ....   641.674875: rtcpu_string: tstamp:21384738358 id:0x04010000 str:"VM0 activating."
     kworker/0:0-1575    [000] ....   641.674881: rtcpu_vinotify_event: tstamp:21385176452 cch:0 vi:0 tag:VIFALC_TDSTATE channel:0x23 frame:0 vi_tstamp:684315516640 data:0x4d9ce50010000000
     kworker/0:0-1575    [000] ....   641.674882: rtcpu_vinotify_event: tstamp:21385176623 cch:0 vi:0 tag:VIFALC_TDSTATE channel:0x23 frame:0 vi_tstamp:684315523232 data:0x0000000031000001
     kworker/0:0-1575    [000] ....   641.674883: rtcpu_vinotify_event: tstamp:21385176797 cch:0 vi:0 tag:VIFALC_TDSTATE channel:0x23 frame:0 vi_tstamp:684315578464 data:0x4d9ce20010000000
     kworker/0:0-1575    [000] ....   641.674884: rtcpu_vinotify_event: tstamp:21385176945 cch:0 vi:0 tag:VIFALC_TDSTATE channel:0x23 frame:0 vi_tstamp:684315585184 data:0x0000000031000002
 vi-output, ov56-1579    [000] ....   644.334915: tegra_channel_capture_setup: vnc_id 0 W 1280 H 720 fmt 9
     kworker/0:0-1575    [000] ....   644.362863: rtcpu_vinotify_event: tstamp:21469011317 cch:0 vi:0 tag:VIFALC_TDSTATE channel:0x23 frame:0 vi_tstamp:687005771936 data:0x4d9ce50010000000
     kworker/0:0-1575    [000] ....   644.362866: rtcpu_vinotify_event: tstamp:21469011490 cch:0 vi:0 tag:VIFALC_TDSTATE channel:0x23 frame:0 vi_tstamp:687005778528 data:0x0000000031000001
     kworker/0:0-1575    [000] ....   644.362868: rtcpu_vinotify_event: tstamp:21469011661 cch:0 vi:0 tag:VIFALC_TDSTATE channel:0x23 frame:0 vi_tstamp:687005834208 data:0x4d9ce20010000000
     kworker/0:0-1575    [000] ....   644.362869: rtcpu_vinotify_event: tstamp:21469011810 cch:0 vi:0 tag:VIFALC_TDSTATE channel:0x23 frame:0 vi_tstamp:687005840864 data:0x0000000031000002
 vi-output, ov56-1579    [003] ....   646.894773: tegra_channel_capture_setup: vnc_id 0 W 1280 H 720 fmt 9
     kworker/0:0-1575    [000] ....   646.938876: rtcpu_vinotify_event: tstamp:21549127849 cch:0 vi:0 tag:VIFALC_TDSTATE channel:0x23 frame:0 vi_tstamp:689565707328 data:0x4d9ce50010000000
     kworker/0:0-1575    [000] ....   646.938879: rtcpu_vinotify_event: tstamp:21549128004 cch:0 vi:0 tag:VIFALC_TDSTATE channel:0x23 frame:0 vi_tstamp:689565713920 data:0x0000000031000001
     kworker/0:0-1575    [000] ....   646.938881: rtcpu_vinotify_event: tstamp:21549128174 cch:0 vi:0 tag:VIFALC_TDSTATE channel:0x23 frame:0 vi_tstamp:689565769184 data:0x4d9ce20010000000
     kworker/0:0-1575    [000] ....   646.938882: rtcpu_vinotify_event: tstamp:21549128326 cch:0 vi:0 tag:VIFALC_TDSTATE channel:0x23 frame:0 vi_tstamp:689565775872 data:0x0000000031000002
 vi-output, ov56-1579    [001] ....   649.454784: tegra_channel_capture_setup: vnc_id 0 W 1280 H 720 fmt 9
     kworker/0:0-1575    [000] ....   649.458868: rtcpu_vinotify_event: tstamp:21628933319 cch:0 vi:0 tag:VIFALC_TDSTATE channel:0x23 frame:0 vi_tstamp:692125764864 data:0x4d9ce50010000000
     kworker/0:0-1575    [000] ....   649.458872: rtcpu_vinotify_event: tstamp:21628933491 cch:0 vi:0 tag:VIFALC_TDSTATE channel:0x23 frame:0 vi_tstamp:692125771488 data:0x0000000031000001
     kworker/0:0-1575    [000] ....   649.458873: rtcpu_vinotify_event: tstamp:21628933667 cch:0 vi:0 tag:VIFALC_TDSTATE channel:0x23 frame:0 vi_tstamp:692125827136 data:0x4d9ce20010000000
     kworker/0:0-1575    [000] ....   649.458874: rtcpu_vinotify_event: tstamp:21628933813 cch:0 vi:0 tag:VIFALC_TDSTATE channel:0x23 frame:0 vi_tstamp:692125833792 data:0x0000000031000002
 vi-output, ov56-1579    [001] ....   652.015227: tegra_channel_capture_setup: vnc_id 0 W 1280 H 720 fmt 9
     kworker/0:0-1575    [000] ....   652.038856: rtcpu_vinotify_event: tstamp:21708955122 cch:0 vi:0 tag:VIFALC_TDSTATE channel:0x23 frame:0 vi_tstamp:694686115872 data:0x4d9ce50010000000
     kworker/0:0-1575    [000] ....   652.038860: rtcpu_vinotify_event: tstamp:21708955276 cch:0 vi:0 tag:VIFALC_TDSTATE channel:0x23 frame:0 vi_tstamp:694686122464 data:0x0000000031000001
     kworker/0:0-1575    [000] ....   652.038861: rtcpu_vinotify_event: tstamp:21708955447 cch:0 vi:0 tag:VIFALC_TDSTATE channel:0x23 frame:0 vi_tstamp:694686157888 data:0x4d9ce20010000000
     kworker/0:0-1575    [000] ....   652.038862: rtcpu_vinotify_event: tstamp:21708955595 cch:0 vi:0 tag:VIFALC_TDSTATE channel:0x23 frame:0 vi_tstamp:694686164576 data:0x0000000031000002
 vi-output, ov56-1579    [001] ....   654.572640: tegra_channel_capture_setup: vnc_id 0 W 1280 H 720 fmt 9
     kworker/0:0-1575    [000] ....   654.614858: rtcpu_vinotify_event: tstamp:21789071583 cch:0 vi:0 tag:VIFALC_TDSTATE channel:0x23 frame:0 vi_tstamp:697243531040 data:0x4d9ce50010000000
     kworker/0:0-1575    [000] ....   654.614862: rtcpu_vinotify_event: tstamp:21789071737 cch:0 vi:0 tag:VIFALC_TDSTATE channel:0x23 frame:0 vi_tstamp:697243537632 data:0x0000000031000001
     kworker/0:0-1575    [000] ....   654.614863: rtcpu_vinotify_event: tstamp:21789071910 cch:0 vi:0 tag:VIFALC_TDSTATE channel:0x23 frame:0 vi_tstamp:697243592896 data:0x4d9ce20010000000
     kworker/0:0-1575    [000] ....   654.614864: rtcpu_vinotify_event: tstamp:21789072059 cch:0 vi:0 tag:VIFALC_TDSTATE channel:0x23 frame:0 vi_tstamp:697243599584 data:0x0000000031000002
        v4l2-ctl-1577    [003] ....   655.487218: tegra_channel_close: vi-output, ov5693 2-0036
 vi-output, ov56-1579    [001] ....   657.100765: tegra_channel_capture_setup: vnc_id 0 W 1280 H 720 fmt 9
        v4l2-ctl-1577    [000] ....   657.103365: tegra_channel_set_stream: enable : 0x0
        v4l2-ctl-1577    [000] ....   657.103369: tegra_channel_set_stream: ov5693 2-0036 : 0x0
        v4l2-ctl-1577    [000] ....   657.104442: tegra_channel_set_stream: 13e10000.host1x:nvcsi@15a00000- : 0x0
        v4l2-ctl-1577    [000] ....   657.104446: csi_s_stream: enable : 0x0
        v4l2-ctl-1577    [000] ....   657.106621: tegra_channel_set_power: ov5693 2-0036 : 0x0
        v4l2-ctl-1577    [000] ....   657.106630: camera_common_s_power: status : 0x0
        v4l2-ctl-1577    [000] ....   657.106671: tegra_channel_set_power: 13e10000.host1x:nvcsi@15a00000- : 0x0
        v4l2-ctl-1577    [000] ....   657.106673: csi_s_power: enable : 0x0

I want to use CSI-2 with a single lane initially, and then transition to using four lanes. After working with a single lane, my intention is to switch to four lanes.

Thanks

The trace log tells didn’t receive any validate from sensor.
Maybe probe the MIPI signal to confirm.

Thanks

Hi, I’m encountering a similar issue. I’m utilizing an FPGA to transmit data in the RGB888 format as well, and the only difference is that my resolution is 1280 x 1024.

My Jetson also appear/dev/video0. When I tried v4l2-ctl --device /dev/video0 --list-formats-ext , the response was:

Type: Video Capture

[0]: 'AR24' (32-bit RBGA 8-8-8-8)
    Size: Discrete 1280x1024
             Interval: Discrete 0.033s (30.000 fps)

And v4l2-ctl --all.

jetson@jetson-desktop:~$ v4l2-ctl --all
Driver Info:
	Driver name      : tegra-video
	Card type        : vi-output, ov5693 2-0036
	Bus info         : platform:tegra-capture-vi:2
	Driver version   : 5.10.104
	Capabilities     : 0x84200001
		Video Capture
		Streaming
		Extended Pix Format
		Device Capabilities
	Device Caps      : 0x04200001
		Video Capture
		Streaming
		Extended Pix Format
Media Driver Info:
	Driver name      : tegra-camrtc-ca
	Model            : NVIDIA Tegra Video Input Device
	Serial           : 
	Bus info         : 
	Media version    : 5.10.104
	Hardware revision: 0x00000003 (3)
	Driver version   : 5.10.104
Interface Info:
	ID               : 0x03000008
	Type             : V4L Video
Entity Info:
	ID               : 0x00000006 (6)
	Name             : vi-output, ov5693 2-0036
	Function         : V4L2 I/O
	Pad 0x01000007   : 0: Sink
	  Link 0x0200000c: from remote pad 0x1000003 of entity '13e10000.host1x:nvcsi@15a00000-': Data, Enabled
Priority: 2
Video input : 0 (Camera 2: no power)
Format Video Capture:
	Width/Height      : 1280/1024
	Pixel Format      : 'AR24' (32-bit BGRA 8-8-8-8)
	Field             : None
	Bytes per Line    : 5120
	Size Image        : 5242880
	Colorspace        : sRGB
	Transfer Function : Default (maps to sRGB)
	YCbCr/HSV Encoding: Default (maps to ITU-R 601)
	Quantization      : Default (maps to Full Range)
	Flags             : 

Camera Controls

                     group_hold 0x009a2003 (bool)   : default=0 value=0 flags=execute-on-write
                     hdr_enable 0x009a2004 (intmenu): min=0 max=1 default=0 value=0
				0: 0 (0x0)
				1: 1 (0x1)
                           gain 0x009a2009 (int64)  : min=10 max=160 step=1 default=10 value=10 flags=slider
                       exposure 0x009a200a (int64)  : min=34 max=550385 step=1 default=33334 value=34 flags=slider
                     frame_rate 0x009a200b (int64)  : min=1816577 max=30000000 step=1 default=30000000 value=1816577 flags=slider
                 exposure_short 0x009a200c (int64)  : min=34 max=550385 step=1 default=33334 value=34 flags=slider
           sensor_configuration 0x009a2032 (u32)    : min=0 max=4294967295 step=1 default=0 [22] flags=read-only, volatile, has-payload
         sensor_mode_i2c_packet 0x009a2033 (u32)    : min=0 max=4294967295 step=1 default=0 [1026] flags=read-only, volatile, has-payload
      sensor_control_i2c_packet 0x009a2034 (u32)    : min=0 max=4294967295 step=1 default=0 [1026] flags=read-only, volatile, has-payload
                    bypass_mode 0x009a2064 (intmenu): min=0 max=1 default=0 value=0
				0: 0 (0x0)
				1: 1 (0x1)
                override_enable 0x009a2065 (intmenu): min=0 max=1 default=0 value=0
				0: 0 (0x0)
				1: 1 (0x1)
                   height_align 0x009a2066 (int)    : min=1 max=16 step=1 default=1 value=1
                     size_align 0x009a2067 (intmenu): min=0 max=2 default=0 value=0
				0: 1 (0x1)
				1: 65536 (0x10000)
				2: 131072 (0x20000)
               write_isp_format 0x009a2068 (int)    : min=1 max=1 step=1 default=1 value=1
       sensor_signal_properties 0x009a2069 (u32)    : min=0 max=4294967295 step=1 default=0 [30][18] flags=read-only, has-payload
        sensor_image_properties 0x009a206a (u32)    : min=0 max=4294967295 step=1 default=0 [30][16] flags=read-only, has-payload
      sensor_control_properties 0x009a206b (u32)    : min=0 max=4294967295 step=1 default=0 [30][36] flags=read-only, has-payload
              sensor_dv_timings 0x009a206c (u32)    : min=0 max=4294967295 step=1 default=0 [30][16] flags=read-only, has-payload
               low_latency_mode 0x009a206d (bool)   : default=0 value=0
               preferred_stride 0x009a206e (int)    : min=0 max=65535 step=1 default=0 value=0
                   sensor_modes 0x009a2082 (int)    : min=0 max=30 step=1 default=30 value=1 flags=read-only

It seems that if the following parameters are set, the Jetson recognizes the data format as RBGA. However, the pixel depth should be 32-bit, but the data bit depth from the FPGA is only 24-bit.

	mode_type = "rgb";
	pixel_phase = "rgb888";
	csi_pixel_bit_depth = "24";

Is this the reason why Jetson did not receive the correct data? And if I want to receive RGB888 format data, how should I set these parameters?

Thanks

Hi @LiCC18 please help to open a new topic if that’s still an issue. Thanks