This is the fifth of six (5/6) posts serializing the FAQ report from the most recent NVIDIA 6G Developer Day (sessions playback here). All questions and answers are directly from attendees on the day and the answers provided to them.
The Sections are:
1/6: Introducing NVIDIA 6G Research & Development Portfolio
2/6: Prototyping 6G with the NVIDIA Sionna Research Kit
3/6: Designing a Modular 6G System Using NVIDIA Aerial Framework
4/6: Aerial Framework – Performant GPU-Accelerated Code From Python
5/6: Optimizing 6G Performance With CUDA and NVIDIA DOCA
6/6: Simulating 6G with NVIDIA Aerial Omniverse Digital Twin
The full FAQ report is here:
2025_6GDD_NVIDIA AI Aerial_FAQ.pdf (374.9 KB)
Optimizing 6G Performance With CUDA and NVIDIA DOCA
Q 5.1: In designing low-latency software for CUDA system, is it recommended to have the data copy during the operational phase? Pre-launch data is reasonable to perform.
A: The answer depends on when the data is available. If available before the operational phase, it is recommended to copy before operational phase begins. If available during operational phase (and \is needed for operational phase) the copy needs to occur during operational phase.
Q 5.2: In case during operational phase if there is need to perform data transfer from CPU to GPU, what are the recommendations to be followed?
A: Recommend using asynchronous CUDA memory copy APIs (e.g. cudaMemcpyAsync, cudaMemcpyBatchAsync).
Q 5.3: Can GPUNetIO also be used to read data from NIC in general for example a sensor data or a network camera stream to be processed in real time?
A: Yes, GPUNetIO technology can be used to receive (or transmit) packets from NIC.
Q 5.4: Is there a web resource where we can find additional information on these guidelines and their updates?
A: As of this writing, the information is available as part of the 6G developer day recording of the talk & slides (“Optimizing 6G Performance With CUDA and NVIDIA DOCA”). In the future, the information may be shared as part of CUDA documentation.
Q 5.5: How is this different from DPDK mem pool (mbuf q feature) technique used for GPU and CPU? Where CPU takes care of headers and sequencing and GPU doing the processing.
A: Presumably the question is about the difference between DPDK external mbuf and GPUNetIO technologies - both technologies achieve the same if so in GPUNetIO.
Q 5.6: Is there a benefit to rearrange the data in the Rx to better pipeline the flow to the CUDA kernels? Meaning reshuffle the data from the air interface locations to benefit in some way.
A: Yes, if the data can be received with temporal alignment.
Q 5.7: Are cudaMemcpy operations needed at all in computers with a unified memory (for example ARC computers (?))?
A: Unless the platform is an integrated GPU platform, there is no unified memory.