Allocating cuda memory for unkown size of assumed size array from fortran to cuda C

Accelerated Computing CUDA CUDA Programming and Performance
1

I have a fortran code with array declared as assumed size array as

_REAL_, INTENT(IN),   DIMENSION(*)     :: STRS5
      _REAL_, INTENT(IN),   DIMENSION(3,*)   :: XSPH
      _REAL_, INTENT(IN),   DIMENSION(*)     :: XMSSPH
      _REAL_, INTENT(IN),   DIMENSION(*)     :: XPAFAC
      _REAL_, INTENT(OUT),  DIMENSION(*)     :: DFV
      _REAL_, INTENT(OUT),  DIMENSION(*)     :: RHONN
      _REAL_, INTENT(OUT),  DIMENSION(3,*)   :: DWD

and I have called the c form fortran as

CALL cuda_wrapper (
     .     LLT, IL      ,ISTATSPH   ,IBI_ASRCH      ,
     .     XMSSPH    ,STRS5  ,SPFARE  ,IPTR,
     .     DFV   ,NNTABL ,NSPHELE_G     ,
     .     IBI_PSRCH , RHONN , ISKIP ,
     .     INDX5  ,XSPH   ,IXSPHEL  ,
     .     IZMSPH     ,XPAFAC     ,NSPHMA     ,
     .     IPBDIM      ,DINC   ,NKERPT  ,
     .     DKERNL  ,DWD ,LGR ,ITWSYM,NNS5IX, 3)

and inside .cu file I have

extern "C" void sph2p2_cuda_wrapper_(int* LLT, int* IL, int* ISTATSPH,
        int* IBI_ASRCH, float* XMSSPH, float* STRS5, float* SPFARE, int* IPTR,
        float* DFV, int* NNTABL, int* NSPHELE_G, int* IBI_PSRCH, float* RHONN,
        int* ISKIP, int* INDX5, float* XSPH, int* IXSPHEL, int* IZMSPH,
        float* XPAFAC, int* NSPHMA, int* IPBDIM, float* DINC, int* NKERPT,
        float* DKERNL, float* DWD, int* LGR, int* ITWSYM, int* NNS5IX,
        int* ITWSYMSIZE)

now i need to allocate memory in cuda for the assumed size array but the actual size of the array is unknown. so How can I allocate the array size in cuda for assumed size array

2

Parameters that determine the size and strides of these arrays are either passed as separate function argument in your Fortran code (you might want to check what NSPHELE_G, NSPHMA, NKERPT, and DINC are, for example), or you should be able to determine them using the SIZE(), LBOUND(), and RBOUND() functions in the Fortran code, allowing you to pass this sizing data to the CUDA host code wrapper.