It is stated that alternate debug modes are available when the NVDBG_SEL pin is pulled up. Does this mean that JTAG debugging, UART debugging, etc. are enabled at the same time?
On the other hand, if the NVDBG_SEL pin is set to N/C, does this mean that only JTAG debugging is enabled and UART debugging is not available at the same time?
Hi, as said in the doc, it is for debug over USB only.
Thank you for your reply.
I understand that JTAG debugging and USB debugging cannot be used at the same time.
However, the documentation does not state that only USB can be used; what Debug I/Fs can be used in addition to USB?
It is for debug over USB only as others are not exposed.
The AGX Orin Devkit seems to be pulled up(R380:10KΩ), do I need to remove this pull up resistance if I want to connect and debug with the JTAG debugger?
No need to remove the pull up. The pin is default low pulled to GND by FET and controlled by debug MCU.
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