Alternate debug modes via NVDBG_SEL pin

[UNA_H]

Hi,

It is stated that alternate debug modes are available when the NVDBG_SEL pin is pulled up. Does this mean that JTAG debugging, UART debugging, etc. are enabled at the same time?
On the other hand, if the NVDBG_SEL pin is set to N/C, does this mean that only JTAG debugging is enabled and UART debugging is not available at the same time?

Best Regards,
UNA

[Trumany]

Hi, as said in the doc, it is for debug over USB only.

[UNA_H]

Hi Trumany,

Thank you for your reply.

I understand that JTAG debugging and USB debugging cannot be used at the same time.
However, the documentation does not state that only USB can be used; what Debug I/Fs can be used in addition to USB?

Best Regards,
UNA

[Trumany]

It is for debug over USB only as others are not exposed.

[UNA_H]

The AGX Orin Devkit seems to be pulled up(R380:10KΩ), do I need to remove this pull up resistance if I want to connect and debug with the JTAG debugger?

[Trumany]

No need to remove the pull up. The pin is default low pulled to GND by FET and controlled by debug MCU.