Anyone explains this ---- the polarity problem of HDMI.HPD ??????

Hi all,
as described in the following figure

(Figure 20: eDP / DP Connection Example, pp39 of the OEM DG of TX2)

HPD signal ( TX2.pins.pin[A33] ) shall be HIGH when valid,

but the TX2 DevKit uses an INVERTING logic between the Display’s HPD and that of the TX2 module
(see the TX2 carrier board schematics for detail)

any explanation ??

Hi Phoenixlee,

Please check the Note 1 of figure 20 and 22. When it is used as HDMI HPD, level shifter can be non-inverting or inverting.