Hi NVIDIA,
We am currently evaluating the hardware architecture for a custom Jetson AGX Thor carrier board. Our client requires a Holoscan-based solution with minimal latency for high-bandwidth sensor ingestion.
Traditionally, on platforms like IGX Orin, the recommended path for ultra-low latency is using an external ConnectX SmartNIC with GPUDirect RDMA. However, I have reviewed the latest documentation for AGX Thor (r38.4) regarding the “Camera over Ethernet (CoE)” solution using the native MGBE interface and SIPL:
I have three specific questions regarding the architectural choices for a custom AGX Thor carrier board:
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Support for External ConnectX + GPUDirect RDMA: If we design a custom carrier board with a PCIe Gen5 slot to host an external ConnectX-7 SmartNIC, is the “Holoscan + GPUDirect RDMA” workflow fully supported on AGX Thor (similar to IGX)? Or is this path deprecated/restricted in favor of the native MGBE interface?
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Native MGBE + CoE + SIPL Architecture: Does the documented “MGBE + CoE + SIPL” architecture replace the need for GPUDirect RDMA? Specifically, does the CoE implementation on Thor achieve zero-copy transfer to GPU memory (bypassing the CPU stack) comparable to RoCE v2 RDMA?
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Latency Comparison: From a Holoscan application perspective, how does the glass-to-glass latency compare between these two approaches?
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Path A: External ConnectX-7 (GPUDirect RDMA) → GPU Memory
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Path B: Native MGBE (CoE) → SIPL/ISP → GPU Memory
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We need to decide whether to reserve board space and PCIe lanes for a ConnectX slot or if relying on Thor’s native MGBE with the new CoE stack is sufficient for low-latency requirements.
Thanks for your guidance.