Bootloader/FW DTB?

Robotics & Edge Computing Jetson & Embedded Systems Jetson AGX Orin
1

Hello. Which dts/dtb should I change to allow the bootloader/fw to use a modified one before running flash.sh?

The issue is when I have a PCIe endpoint device with more than 128MB BAR, I get the following error

ASSERT [PciHostBridgeDxe] /dvs/git/dirty/git-master_linux/out/nvidia/bootloader/uefi/Jetson_RELEASE/edk2/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridge.c(963): (Translation & Alignment) == 0

I can update and generate a dtb with working ranges in
/boot/dtb/kernel_tegra234-p3701-0000-p3737-0000.dtb
and
/boot/kernel_tegra234-p3701-0000-p3737-0000.dtb

However, this only helps with the kernel recognizing things correctly. The first few layers of booting still dislikes the larger BARs.
If I power on the endpoint device after the first levels of boot, then the system boots up correctly and the kernel recognizes the PCIe device and its BARs just fine.

So my question is about the dtb used in the bootloader (BL2/3/31/32, etc)

Thanks

3

Please update the device tree before you flash the board and reflash so that UEFI can take effect.

4

I did update
$PATH/hw_image/JetPack_5.0.2_Linux_JETSON_AGX_ORIN_TARGETS/Linux_for_Tegra/bootloader/kernel_tegra234-p3701-0000-p3737-0000.dtb
and ran flash.sh, but that didnt seem to fix the issue.
Is that the correct file to modify, or is there a different one I should be targeting?

Thanks

5

Please change the one under kernel/dtb, remove kernel dtb under bootloader before you flash.

After the flash is done, you shall see new bootloader dtb gerneated under L4T/bootloader again.

6

For future reference, I had to change both kernel/dtb /kernel_tegra234-p3701-0000-p3737-0000.dtb and kernel/dtb/tegra234-p3701-0000-p3737-0000.dtb to get the desired behavior.

Thanks

8

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