Hi all:
We want to adjust settle time for our C-PHY sensor.
In Xavier there are 2 data lane and 1 clk lane in each trio.
According to TRM NVCSI_PHY_0_NVCSI_CIL_A_CONTROL_0 can set settle time.
So is that means if we set THS_SETTLE0_A to 20, CLK_SETTLE0_A should be set to 20-7=13?
Hi, Usually we have the design to use D-PHY and rarely use C-PHY. So there is no much public information about tuning C-PHY timing. Could you please share more infromation about the hardware design? Is it possible to use D-PHY instead of C-PHY?
We can catch image via C-PHY now.
We just want to know how to set settle time.
Our customers can only use C-PHY sensor in this project.