# CAN bus inconsistent behavior on L4T 32.4.4 and L4T 32.5.0 **URL:** \ **Category:** Jetson AGX Xavier\ **Tags:** can-bus\ **Created:** [April 26, 2021, 3:56am UTC](https://forums.developer.nvidia.com/t/can-bus-inconsistent-behavior-on-l4t-32-4-4-and-l4t-32-5-0/176255 "2021-04-26T03:56:44Z")\ **Posts on this page:** 8\ **Page:** 2
**Author:** ![Luna2020](https://sea2.discourse-cdn.com/nvidia/user_avatar/forums.developer.nvidia.com/luna2020/32/12948_2.png) [@Luna2020](https://forums.developer.nvidia.com/u/Luna2020)\ **Post date:** [May 7, 2021, 8:52am UTC](https://forums.developer.nvidia.com/t/can-bus-inconsistent-behavior-on-l4t-32-4-4-and-l4t-32-5-0/176255/22 "2021-05-07T08:52:04Z")
Hi shgarg, After CAN up on network, I checked the parent is still ‘osc’. Now twice modprobe mttcan, then mttcan works fine with NX CAN. ```auto nvidia@xavier:~$ sudo modprobe can nvidia@xavier:~$ sudo modprobe can-raw nvidia@xavier:~$ sudo modprobe can-dev nvidia@xavier:~$ sudo modprobe mttcan nvidia@xavier:~$ nvidia@xavier:~$ sudo ip link set can0 down nvidia@xavier:~$ sudo ip link set can1 down nvidia@xavier:~$ sudo ip link set can0 up type can bitrate 1000000 dbitrate 1000000 restart-ms 1000 berr-reporting on fd on nvidia@xavier:~$ sudo ip link set can1 up type can bitrate 1000000 dbitrate 1000000 restart-ms 1000 berr-reporting on fd on nvidia@xavier:~$ cat /proc/device-tree/mttcan@c310000/pll_source pllc nvidia@xavier:~$ sudo cat /sys/kernel/debug/bpmp/debug/clk/can1/parent osc nvidia@xavier:~$ sudo ip link set up can0 nvidia@xavier:~$ sudo ip link set up can1 nvidia@xavier:~$ nvidia@xavier:~$ cat /proc/device-tree/mttcan@c310000/pll_source pllc nvidia@xaviersudo cat /sys/kernel/debug/bpmp/debug/clk/can1/parent osc nvidia@xavier:~$ ip -s -d link show can0 14: can0: mtu 72 qdisc pfifo_fast state UP mode DEFAULT group default qlen 10 link/can promiscuity 0 can state ERROR-ACTIVE (berr-counter tx 0 rx 0) restart-ms 1000 bitrate 1010526 sample-point 0.736 tq 52 prop-seg 6 phase-seg1 7 phase-seg2 5 sjw 1 mttcan: tseg1 2..255 tseg2 0..127 sjw 1..127 brp 1..511 brp-inc 1 dbitrate 1010526 dsample-point 0.736 dtq 52 dprop-seg 6 dphase-seg1 7 dphase-seg2 5 dsjw 1 mttcan: dtseg1 1..31 dtseg2 0..15 dsjw 1..15 dbrp 1..15 dbrp-inc 1 clock 38400000 re-started bus-errors arbit-lost error-warn error-pass bus-off 0 0 0 0 0 0 numtxqueues 1 numrxqueues 1 gso_max_size 65536 gso_max_segs 65535 RX: bytes packets errors dropped overrun mcast 0 0 0 0 0 0 TX: bytes packets errors dropped carrier collsns 0 0 0 0 0 0 ``` ---
**Author:** ![Luna2020](https://sea2.discourse-cdn.com/nvidia/user_avatar/forums.developer.nvidia.com/luna2020/32/12948_2.png) [@Luna2020](https://forums.developer.nvidia.com/u/Luna2020)\ **Post date:** [May 7, 2021, 9:10am UTC](https://forums.developer.nvidia.com/t/can-bus-inconsistent-behavior-on-l4t-32-4-4-and-l4t-32-5-0/176255/23 "2021-05-07T09:10:52Z")
Hi shgarg, I made a mistake while modify osc to pllc, now it’s right. ```auto nvidia@xavier:~$ cat /proc/device-tree/mttcan@c310000/pll_source pllc nvidia@xavier:~$ sudo cat /sys/kernel/debug/bpmp/debug/clk/can1/parent pll_c ``` ---
**Author:** ![shgarg](https://sea2.discourse-cdn.com/nvidia/user_avatar/forums.developer.nvidia.com/shgarg/32/9748_2.png) [@shgarg](https://forums.developer.nvidia.com/u/shgarg)\ **Post date:** [May 7, 2021, 9:28am UTC](https://forums.developer.nvidia.com/t/can-bus-inconsistent-behavior-on-l4t-32-4-4-and-l4t-32-5-0/176255/24 "2021-05-07T09:28:25Z")
Ok, so things are fine now or still some issue? ---
**Author:** ![Luna2020](https://sea2.discourse-cdn.com/nvidia/user_avatar/forums.developer.nvidia.com/luna2020/32/12948_2.png) [@Luna2020](https://forums.developer.nvidia.com/u/Luna2020)\ **Post date:** [May 7, 2021, 3:00pm UTC](https://forums.developer.nvidia.com/t/can-bus-inconsistent-behavior-on-l4t-32-4-4-and-l4t-32-5-0/176255/25 "2021-05-07T15:00:02Z")
Hi shgarg, When I change clock to pllc both of the mttcan work fine, but dbitrate max is 2Mbps, if large then 2Mbps there will be “mttcan c310000.mttcan can0: bitrate error 3.0%”. ```auto All mttcan work fine sudo ip link set can0 up type can bitrate 2000000 dbitrate 2000000 restart-ms 1000 berr-reporting on fd on ``` ```auto All mttcan have bit error large then 2000000 sudo ip link set can0 up type can bitrate 2000000 dbitrate 3000000 restart-ms 1000 berr-reporting on fd on ``` ---
**Author:** ![make9-11](https://developer.download.nvidia.com/images/forums/profile-default-devtalk-84.png) [@make9-11](https://forums.developer.nvidia.com/u/make9-11)\ **Post date:** [May 8, 2021, 2:01am UTC](https://forums.developer.nvidia.com/t/can-bus-inconsistent-behavior-on-l4t-32-4-4-and-l4t-32-5-0/176255/26 "2021-05-08T02:01:23Z")
Hi,I have the same problem,can you tell me how to change the clock to pllc? ---
**Author:** ![JerryChang](https://sea2.discourse-cdn.com/nvidia/user_avatar/forums.developer.nvidia.com/jerrychang/32/14043_2.png) [@JerryChang](https://forums.developer.nvidia.com/u/JerryChang)\ **Post date:** [May 10, 2021, 1:47am UTC](https://forums.developer.nvidia.com/t/can-bus-inconsistent-behavior-on-l4t-32-4-4-and-l4t-32-5-0/176255/27 "2021-05-10T01:47:36Z")
hello make9-11 please check developer guide, [Flashing a Specific Partition](https://docs.nvidia.com/jetson/archives/l4t-archived/l4t-325/index.html#page/Tegra%20Linux%20Driver%20Package%20Development%20Guide/flashing.html#wwpID0E06H0HA). you can flash a specific partition instead of flashing the whole device by using the command line switch `‑k` . thanks ---
**Author:** ![shgarg](https://sea2.discourse-cdn.com/nvidia/user_avatar/forums.developer.nvidia.com/shgarg/32/9748_2.png) [@shgarg](https://forums.developer.nvidia.com/u/shgarg)\ **Post date:** [May 13, 2021, 10:42am UTC](https://forums.developer.nvidia.com/t/can-bus-inconsistent-behavior-on-l4t-32-4-4-and-l4t-32-5-0/176255/28 "2021-05-13T10:42:07Z")
You need to update mttcan node clocks section and pll-source inside kernel dtb. ---
**Author:** ![TomNVIDIA](https://sea2.discourse-cdn.com/nvidia/user_avatar/forums.developer.nvidia.com/tomnvidia/32/14181_2.png) [@TomNVIDIA](https://forums.developer.nvidia.com/u/TomNVIDIA)\ **Post date:** [October 18, 2021, 6:19pm UTC](https://forums.developer.nvidia.com/t/can-bus-inconsistent-behavior-on-l4t-32-4-4-and-l4t-32-5-0/176255/30 "2021-10-18T18:19:35Z")
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