CAN bus inconsistent behavior on L4T 32.4.4 and L4T 32.5.0

Hi chester,
For Jetson NX, on 32.5.0, CAN clock should be set to pllc and rate would be 34MHz. But in your case, it is osc with 38.4 MHz. Can you make sure you are using R32.5 only in NX and are you checking clock when you made CAN up on network ? Although , having different clock rates will fail the communication but am wondering why for you it is “osc” on NX with 32.5
Please check and comment.

Hi @shgarg
Thanks your hints! I just solve this problem by changing my NX’s dts: mttcan@c310000 setting, mostly change pll_source to pll_source="pllc" and chnage to clock-names = “can_core”, “can_host”, “can”, "pllc"

Hi chester,
Many thanks for the result.
So are you saying that R32.4.4 with R32.5 communication is working?
Also, why you need to change pllc in R32.5? Ok, you have changed NX clock in R32.4 to pllc ?

Hi @shgarg
Yes, I change NX’s 32.5.0 CAN bus parent source to pllc. Here’s my test summary:

R32.5.0 NX (parent clock: osc) and R32.4.4 Xavier (parent clock: osc) => not working
R32.5.0 NX (parent clock: osc) and R32.5.0 Xavier (parent clock: osc) => working

R32.5.0 NX (parent clock: pllc) and R32.4.4 Xavier (parent clock: osc) => working
R32.5.0 NX (parent clock: pllc) and R32.5.0 Xavier (parent clock: osc) => working

Oh, with the cases you have mentioned am wondering how they are passing with different clocks. If clock rate are different , bitrates differ then you will see ACK errors. In your case, are the bitrates same at both the sides for this case (R32.5.0 NX (parent clock: pllc) and R32.4.4 Xavier (parent clock: osc) => working) actual bitrates which got set can be found from the command:
ip -d -s link show can0

Hi shgarg,

I find the same problem:
R32.5.0 NX (parent clock: pllc) and R32.5.0 Xavier (parent clock: osc) => working
R32.4.3 NX (parent clock: osc) and R32.5.0 Xavier (parent clock: osc) => not working

Step1.
Xavier CAN0 connect to NX CAN0 first time not working

sudo modprobe can
sudo modprobe can-raw
sudo modprobe can-dev
sudo modprobe mttcan

echo 'nvidia' | sudo -S sudo ip link set can0 down
echo 'nvidia' | sudo -S sudo ip link set can1 down
sudo ip link set can0 up type can bitrate 1000000   dbitrate 1000000 restart-ms 1000 berr-reporting on fd on
sudo ip link set can1 up type can bitrate 1000000   dbitrate 1000000 restart-ms 1000 berr-reporting on fd on

Xavier DMESG:
[   63.240865] mttcan c310000.mttcan can0: entered error passive state
[   63.241038] mttcan c310000.mttcan can0: entered bus off state
[   63.241210] mttcan c310000.mttcan can0: Bit1 Error Detected
[   64.252272] mttcan c310000.mttcan can0: wait for bus off seq
[   64.264312] mttcan c310000.mttcan can0: entered error warning state
[   64.264458] mttcan c310000.mttcan can0: entered error passive state
[   64.264574] mttcan c310000.mttcan can0: entered bus off state
[   64.264666] mttcan c310000.mttcan can0: Bit1 Error Detected
[   64.367262] mttcan c310000.mttcan can0: bitrate error 1.0%
[   64.367397] mttcan c310000.mttcan can0: Bitrate set
[   64.367405] mttcan c310000.mttcan can0: bitrate error 1.0%
[   64.367602] mttcan c310000.mttcan can0: wait for bus off seq
[   64.379636] mttcan c310000.mttcan can0: Bit0 Error Detected

Step2.
Xavier CAN0 connect to NX CAN0 second time tansmit and recieve fine

sudo rmmod mttcan   
sudo rmmod can_dev  
sudo rmmod can_raw  
sudo rmmod can

sudo modprobe can
sudo modprobe can-raw
sudo modprobe can-dev
sudo modprobe mttcan

echo 'nvidia' | sudo -S sudo ip link set can0 down
echo 'nvidia' | sudo -S sudo ip link set can1 down
sudo ip link set can0 up type can bitrate 1000000   dbitrate 1000000 restart-ms 1000 berr-reporting on fd on
sudo ip link set can1 up type can bitrate 1000000   dbitrate 1000000 restart-ms 1000 berr-reporting on fd on

Okay, good that the problem is solved.
Whenever I have a setup, I will check why it is so.

Thanks,
Shubhi

Hi shgarg,

Xavier CAN parent clock can be set to pllc too or must be osc?

Thanks.

You can set it to pllc.
Also, for you also R32.5.0 NX (parent clock: pllc) it was by default pllc or you had to make it pllc.
Because I have made parent clock to pllc on NX for R32.5
I want to see if it is not reflecting for you guys.

Internally I can still see that R32.5 has pllc clock on NX.

Hi shgarg,

I set Xavier mttcan clock source to pllc, but the parent clock is still osc.

nvidia@xavier:~$ sudo cat /sys/kernel/debug/bpmp/debug/clk/can1/parent
osc
nvidia@xavier:~$ cat /proc/device-tree/mttcan@c310000/pll_source
pllc

and it’s working with this?

FYI, you need to check parent after you make CAN up on network
ip link set can0 up

Hi shgarg,

After CAN up on network, I checked the parent is still ‘osc’.
Now twice modprobe mttcan, then mttcan works fine with NX CAN.

nvidia@xavier:~$ sudo modprobe can
nvidia@xavier:~$ sudo modprobe can-raw
nvidia@xavier:~$ sudo modprobe can-dev
nvidia@xavier:~$ sudo modprobe mttcan
nvidia@xavier:~$ 
nvidia@xavier:~$ sudo ip link set can0 down
nvidia@xavier:~$ sudo ip link set can1 down
nvidia@xavier:~$ sudo ip link set can0 up type can bitrate 1000000   dbitrate 1000000 restart-ms 1000 berr-reporting on fd on
nvidia@xavier:~$ sudo ip link set can1 up type can bitrate 1000000   dbitrate 1000000 restart-ms 1000 berr-reporting on fd on
nvidia@xavier:~$ cat /proc/device-tree/mttcan@c310000/pll_source
pllc
nvidia@xavier:~$ sudo cat /sys/kernel/debug/bpmp/debug/clk/can1/parent
osc
nvidia@xavier:~$ sudo ip link set up can0
nvidia@xavier:~$ sudo ip link set up can1
nvidia@xavier:~$ 
nvidia@xavier:~$ cat /proc/device-tree/mttcan@c310000/pll_source
pllc
nvidia@xaviersudo cat /sys/kernel/debug/bpmp/debug/clk/can1/parent
osc
nvidia@xavier:~$ ip -s -d link show can0
14: can0: <NOARP,UP,LOWER_UP,ECHO> mtu 72 qdisc pfifo_fast state UP mode DEFAULT group default qlen 10
    link/can  promiscuity 0 
    can <BERR-REPORTING,FD> state ERROR-ACTIVE (berr-counter tx 0 rx 0) restart-ms 1000 
	  bitrate 1010526 sample-point 0.736 
	  tq 52 prop-seg 6 phase-seg1 7 phase-seg2 5 sjw 1
	  mttcan: tseg1 2..255 tseg2 0..127 sjw 1..127 brp 1..511 brp-inc 1
	  dbitrate 1010526 dsample-point 0.736 
	  dtq 52 dprop-seg 6 dphase-seg1 7 dphase-seg2 5 dsjw 1
	  mttcan: dtseg1 1..31 dtseg2 0..15 dsjw 1..15 dbrp 1..15 dbrp-inc 1
	  clock 38400000
	  re-started bus-errors arbit-lost error-warn error-pass bus-off
	  0          0          0          0          0          0         numtxqueues 1 numrxqueues 1 gso_max_size 65536 gso_max_segs 65535 
    RX: bytes  packets  errors  dropped overrun mcast   
    0          0        0       0       0       0       
    TX: bytes  packets  errors  dropped carrier collsns 
    0          0        0       0       0       0      

Hi shgarg,

I made a mistake while modify osc to pllc, now it’s right.

nvidia@xavier:~$ cat /proc/device-tree/mttcan@c310000/pll_source
pllc
nvidia@xavier:~$ sudo cat /sys/kernel/debug/bpmp/debug/clk/can1/parent
pll_c

Ok, so things are fine now or still some issue?

Hi shgarg,

When I change clock to pllc both of the mttcan work fine, but dbitrate max is 2Mbps, if large then 2Mbps there will be “mttcan c310000.mttcan can0: bitrate error 3.0%”.

All mttcan work fine
sudo ip link set can0 up type can bitrate 2000000   dbitrate 2000000 restart-ms 1000 berr-reporting on fd on
All mttcan have bit error large then 2000000
sudo ip link set can0 up type can bitrate 2000000   dbitrate 3000000 restart-ms 1000 berr-reporting on fd on

Hi,I have the same problem,can you tell me how to change the clock to pllc?

hello make9-11

please check developer guide, Flashing a Specific Partition.
you can flash a specific partition instead of flashing the whole device by using the command line switch ‑k .
thanks

You need to update mttcan node clocks section and pll-source inside kernel dtb.