CAN with Jetson Nano Production Module

I am trying to bring up CAN interface with the Jetson Nano Production Module.

I am using a custom carrier board, with an MCP2515 on it. It is connected to SPI:

  • CAN MOSI: SPI1A_DOUT
  • CAN MISO: SPI1A_DIN
  • CAN SCK: SPI1A_SCK
  • CAN CE: SPI1A_CS0
  • CAN Interrupt: GPIO3_PZ.00 (=GPIO200)
    The pins are configured with the Excel Pinmux tool.

Everything works fine, when I use the “developer” module on my base board. So, the hardware seems to work…
When I switch to the production module, I get an error message during boot:
mcp251x spi0.0: MCP251x didn’t enter in conf mode after reset
mcp251x spi0.0: Probe failed. err=16
mcp251x: probe of spi0.0 failed with error -16

I use identical pinmux and GPIO-default files fpr both modules.
Device tree is almost identical, except:
sdhci@700b0600: SDMMC4 for EMMC is enabled
sdhci@700b0000: SDMMC1 for on-module SD-card is disabled
spi@70410000: QSPI is disabled

Are there any further differences I have to take into account in the device tree?

Are there any modules that have to be installed ore configured? (mcp251x.ko is in place…)

Thank you for any help!

Suggest to check the SPI pin configure and confirm with SPI loopback test.

sudo cat /sys/kernel/debug/tegra_pinctrl_reg | grep -i spi

Bank: 1 Reg: 0x70003050 Val: 0x0000e044 -> spi1_mosi_pc0
Bank: 1 Reg: 0x70003054 Val: 0x0000e044 -> spi1_miso_pc1
Bank: 1 Reg: 0x70003058 Val: 0x0000e044 -> spi1_sck_pc2
Bank: 1 Reg: 0x7000305c Val: 0x0000e048 -> spi1_cs0_pc3
Bank: 1 Reg: 0x70003060 Val: 0x0000e048 -> spi1_cs1_pc4

sudo cat /sys/kernel/debug/tegra_pinctrl_reg | grep -i spi shows:

Bank: 1 Reg: 0x70003050 Val: 0x0000e008 → spi1_mosi_pc0
Bank: 1 Reg: 0x70003054 Val: 0x0000e044 → spi1_miso_pc1
Bank: 1 Reg: 0x70003058 Val: 0x0000e008 → spi1_sck_pc2
Bank: 1 Reg: 0x7000305c Val: 0x0000e008 → spi1_cs0_pc3
Bank: 1 Reg: 0x70003060 Val: 0x0000e008 → spi1_cs1_pc4

This is identical in both configurations (working config with dev module and non-working with prod module).

spidev_test did recognize the SPI device. Could not (yet) do a loopback- CAN chip is hard wired on the board.

I noticed that GPIO config is different:
sudo cat /sys/kernel/debug/tegra_gpio
delivers
Z: 6:1 0e 08 08 04 00 06 020600
on the working,
Z: 6:1 0f 08 00 07 00 04 000400
on the non-working config (GPIO3_PZ.00 should be interrupt pin).

Could this be the problem?
How to read the output? (Name:Bank:Port CNF OE OUT IN INT_STA INT_ENB INT_LVL - one bit per GPIO-Pin? What does CNF mean?)

Need below command to enable the spidev driver.
sudo modprobe spidev

For the GPIO need to check the C: due to they are GPIO C0 -C4

Also the value looks like different with my previous comment that’s verified.
Did you use jetson-io to configure the SPI pin?

using modprobe spidev didn’t change anything.
lsmod shows spidev (and also mcp251x and can_dev).

Yes, the values are diferent from your post. How to change this?
(Howerver, they are the same as in my working developer module configuration.)

The GPIO config for C reads:
C: 0:2 1f 00 00 00 00 00 000000

I didn’t use jetson-io. I have a custom dtb because I need camera interface, keyboard pins and so on. Pinmux is generated with a modified version of NV_Jetson_Nano_Module_Pinmux_Config_Template.xlsm.

||||||||||||
|—|—|—|—|—|—|—|—|—|—|—|—|—|
|SPI0_MOSI|89|SPI1_MOSI|GPIO3_PC.00|SPI1A_DOUT|||||pd|SPI1A_DOUT|Output|Int PU||SPI0_MISO|93|SPI1_MISO|GPIO3_PC.01|SPI1A_DIN|||||pd|SPI1A_DIN|Input|Int PD|
|SPI0_SCK|91|SPI1_SCK|GPIO3_PC.02|SPI1A_SCK|||||pd|SPI1A_SCK|Output|Int PU|
|SPI0_CS0*|95|SPI1_CS0|GPIO3_PC.03|SPI1A_CS0|||||pu|SPI1A_CS0|Output|Int PU|
|SPI0_CS1*|97|SPI1_CS1|GPIO3_PC.04|SPI1A_CS1|||||pu|SPI1A_CS1|Output|Int PU|

The generated dtb is hooked in boot/extlinux/extlinux.conf.

The GPIO REG dump incorrect it shouldn’t be 0x1f,
What’s your BSP version?

Have reference to below to configure the GPIO.

And modify those spi1_xxx_pc* to “spi1” like below in device tree.

                spi1_mosi_pc0 {
                        nvidia,pins = "spi1_mosi_pc0";
                        nvidia,function = "spi1";
                        nvidia,pull = <0x1>;
                        nvidia,tristate = <0x0>;
                        nvidia,enable-input = <0x1>;
                };

Version is 32.5.1

don’t know about gpio@6000d000 - where is this? My pinmux entries are under pinmux@700008d4

Strange thing: I edited pinmux as proposed, bu still the 1f is there.

ShaneCCC,
that is really strange: whatever I do, port C config shows the 1f.
I understand, that this means that Port C 0…5 are configured as GPIO, not SP1.
I am pretty sure that my pinmux is correct. Disassembly of the dtb shows exactly what you posted for spi1_mosi_pc0.

Whatever the problem is, it only exists for production module.

My DTS contains
compatible = “nvidia,p3449-0000-b00+p3448-0000-b00”, “nvidia,jetson-nano”, “nvidia,tegra210”;
model = “jetson-nano”;
Do I have to change this?

You need remove the TEGRA_GPIO(C, *) in below in your device tree, otherwise those pin will be GPIO instead of SPI pin even the spi1_mosi_pc0/spi1_miso_pc… configure as spi1.

        gpio: gpio@6000d000 {
                gpio-init-names = "default";
                gpio-init-0 = <&gpio_default>;

                gpio_default: default {
                        gpio-input = <
                                TEGRA_GPIO(BB, 0)
                                TEGRA_GPIO(B, 4)
                                TEGRA_GPIO(B, 5)
                                TEGRA_GPIO(B, 6)
                                TEGRA_GPIO(B, 7)
                                TEGRA_GPIO(DD, 0)
                                TEGRA_GPIO(E, 6)
                                TEGRA_GPIO(S, 5)
                                TEGRA_GPIO(A, 5)
                                TEGRA_GPIO(X, 4)
                                TEGRA_GPIO(X, 5)
                                TEGRA_GPIO(X, 6)
                                TEGRA_GPIO(Y, 1)
                                TEGRA_GPIO(Y, 2)
                                TEGRA_GPIO(V, 0)
                                TEGRA_GPIO(V, 1)
                                TEGRA_GPIO(Z, 0)
                                TEGRA_GPIO(Z, 2)
                                TEGRA_GPIO(J, 5)
                                TEGRA_GPIO(J, 6)
                                TEGRA_GPIO(J, 4)
                                TEGRA_GPIO(J, 7)
                                TEGRA_GPIO(G, 2)
                                TEGRA_GPIO(G, 3)
                                TEGRA_GPIO(C, 0)
                                TEGRA_GPIO(C, 1)
                                TEGRA_GPIO(C, 2)
                                TEGRA_GPIO(C, 3)
                                TEGRA_GPIO(C, 4)
                                TEGRA_GPIO(H, 2)
                                TEGRA_GPIO(H, 5)
                                TEGRA_GPIO(H, 6)
                                TEGRA_GPIO(I, 1)
                                TEGRA_GPIO(CC, 4)
                                >;

Don’t find any Port C.
This is my GPIO definition:

#include <dt-bindings/gpio/tegra-gpio.h>

/ {
	gpio: gpio@6000d000 {
		gpio-init-names = "default";
		gpio-init-0 = <&gpio_default>;

		gpio_default: default {
			gpio-input = <
				TEGRA_GPIO(B, 4)
				TEGRA_GPIO(B, 6)
				TEGRA_GPIO(B, 7)
				TEGRA_GPIO(DD, 0)
				TEGRA_GPIO(S, 5)
				TEGRA_GPIO(A, 5)
				TEGRA_GPIO(X, 4)
				TEGRA_GPIO(X, 5)
				TEGRA_GPIO(X, 6)
				TEGRA_GPIO(Y, 1)
				TEGRA_GPIO(V, 1)
				TEGRA_GPIO(Z, 0)
				TEGRA_GPIO(Z, 2)
				TEGRA_GPIO(J, 1)
				TEGRA_GPIO(G, 0)
				TEGRA_GPIO(G, 1)
				TEGRA_GPIO(H, 2)
				TEGRA_GPIO(H, 5)
				TEGRA_GPIO(H, 6)
				TEGRA_GPIO(I, 1)
				TEGRA_GPIO(CC, 4)
				>;
			gpio-output-low = <
				TEGRA_GPIO(S, 7)
				TEGRA_GPIO(T, 0)
				TEGRA_GPIO(Z, 3)
				TEGRA_GPIO(H, 0)
				TEGRA_GPIO(H, 3)
				TEGRA_GPIO(H, 4)
				TEGRA_GPIO(H, 7)
				TEGRA_GPIO(I, 0)
				TEGRA_GPIO(I, 2)
				>;
			gpio-output-high = <
				TEGRA_GPIO(A, 6)
				TEGRA_GPIO(X, 3)
				TEGRA_GPIO(CC, 7)
				>;
		};
	};
};

In disassembly of .dtb it looks like this:

	gpio@6000d000 {
		compatible = "nvidia,tegra210-gpio", "nvidia,tegra124-gpio", "nvidia,tegra30-gpio";
		reg = <0x0 0x6000d000 0x0 0x1000>;
		interrupts = <0x0 0x20 0x4 0x0 0x21 0x4 0x0 0x22 0x4 0x0 0x23 0x4 0x0 0x37 0x4 0x0 0x57 0x4 0x0 0x59 0x4 0x0 0x7d 0x4>;
		#gpio-cells = <0x2>;
		gpio-controller;
		#interrupt-cells = <0x2>;
		interrupt-controller;
		gpio-ranges = <0x40 0x0 0x0 0xf6>;
		status = "okay";
		gpio-init-names = "default";
		gpio-init-0 = <0x41>;
		linux,phandle = <0x5b>;
		phandle = <0x5b>;

		e2614-rt5658-audio {
			gpio-hog;
			function;
			gpios = <0x4c 0x0 0x4d 0x0 0x4e 0x0 0x4f 0x0 0xd8 0x0 0x95 0x0>;
			label = "I2S4_LRCLK", "I2S4_SDIN", "I2S4_SDOUT", "I2S4_CLK", "AUDIO_MCLK", "AUD_RST";
			status = "disabled";
			linux,phandle = <0xb7>;
			phandle = <0xb7>;
		};

		system-suspend-gpio {
			status = "okay";
			gpio-hog;
			output-high;
			gpio-suspend;
			suspend-output-low;
			gpios = <0x6 0x0>;
			linux,phandle = <0xe8>;
			phandle = <0xe8>;
		};

		default {
			gpio-input = <0xc 0xe 0xf 0xe8 0x95 0x5 0xbc 0xbd 0xbe 0xc1 0xa9 0xc8 0xca 0x49 0x30 0x31 0x3a 0x3d 0x3e 0x41 0xe4>;
			gpio-output-low = <0x97 0x98 0xcb 0x38 0x3b 0x3c 0x3f 0x40 0x42>;
			gpio-output-high = <0x6 0xbb 0xe7>;
			linux,phandle = <0x41>;
			phandle = <0x41>;
		};
	};

I think, port Cx would be 0x10…0x14.

Thank you for your assistance (and your patience…)

I would suggest to use J4.6 or J4.6.1
Otherwise may need apply below patch and add below to your device tree to check if the problem for 0x1F

   gpio_default: default{
   gpio-hog;
   function;
   gpios = <TEGRA_GPIO(C, 0) 0 TEGRA_GPIO(C, 1) 0 TEGRA_GPIO(C, 2) 0 TEGRA_GPIO(C, 3) TEGRA_GPIO(C,4) 0>;

Thank you. I will check it out.

GPIO configuration and CAN work if Jetpack 4.6.2 is used.
Thank you for assistance.

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