# Cannot change "soc\_gpio25\_pp6" to GPIO output mode **URL:** \ **Category:** Jetson Orin NX\ **Tags:** board-design, gpio\ **Created:** [August 27, 2026, 5:33pm UTC](https://forums.developer.nvidia.com/t/cannot-change-soc-gpio25-pp6-to-gpio-output-mode/381524 "2026-08-27T17:33:41Z")\ **Posts on this page:** 9\ **Page:** 1
**Author:** ![aespinoza1](https://developer.download.nvidia.com/images/forums/profile-default-devtalk-84.png) [@aespinoza1](https://forums.developer.nvidia.com/u/aespinoza1)\ **Post date:** [August 27, 2026, 5:33pm UTC](https://forums.developer.nvidia.com/t/cannot-change-soc-gpio25-pp6-to-gpio-output-mode/381524/1 "2026-08-27T17:33:41Z")
My issue is that I am trying to set both these pins as outputs, SODIUM pin 124 which maps to in GPIO02 signal in spreadsheet and then GPIO03\_PP.06 in customer usage column and then SODIMM pin 127 which maps gpio04 signal name and to GPIO3\_PCC01 in customer usage column. However, Once I go into the Orin and try to toggle these pins they are stuck at 0v which we confirmed physically on an oscilloscope. Is there anything special we are missing to toggle these pins? Other pins such as GPIO9, GPIO1 and GPIO14 we have been able to toggle just fine. ![image](https://global.discourse-cdn.com/nvidia/original/4X/1/6/3/16398d0f47f597c554ee324298a558ee1dc11f1d.png) ---
**Author:** ![KevinFFF](https://sea2.discourse-cdn.com/nvidia/user_avatar/forums.developer.nvidia.com/kevinfff/32/15508_2.png) [@KevinFFF](https://forums.developer.nvidia.com/u/KevinFFF)\ **Post date:** [August 28, 2026, 1:35am UTC](https://forums.developer.nvidia.com/t/cannot-change-soc-gpio25-pp6-to-gpio-output-mode/381524/3 "2026-08-28T01:35:45Z")
Hi aespinoza1, Are you using the devkit or custom board for Orin NX? What’s the Jetpack version in use? The current pinmux configuration for GPIO02/GPIO04 looks good to me. Do you run the following commands to toggle them? ```auto # gpioset --mode=wait `gpiofind "PP.06"`=1 # gpioset --mode=wait `gpiofind "PP.06"`=0 # gpioset --mode=wait `gpiofind "PCC.01"`=1 # gpioset --mode=wait `gpiofind "PCC.01"`=0 ``` ---
**Author:** ![aespinoza1](https://developer.download.nvidia.com/images/forums/profile-default-devtalk-84.png) [@aespinoza1](https://forums.developer.nvidia.com/u/aespinoza1)\ **Post date:** [August 28, 2026, 4:37pm UTC](https://forums.developer.nvidia.com/t/cannot-change-soc-gpio25-pp6-to-gpio-output-mode/381524/4 "2026-08-28T16:37:25Z")
We are using a custom board for the Orin NX. Jetpack 6.2.1 l4t 36.4.4 We were using this command are these equivalents? We were able to toggle other pins on the board such as SODIMM pin 230 and 118 using this command sudo gpioset --mode=signal gpiochip0 98=1 sudo gpioset --mode=signal gpiochip0 98=0 ---
**Author:** ![KevinFFF](https://sea2.discourse-cdn.com/nvidia/user_avatar/forums.developer.nvidia.com/kevinfff/32/15508_2.png) [@KevinFFF](https://forums.developer.nvidia.com/u/KevinFFF)\ **Post date:** [August 31, 2026, 1:51am UTC](https://forums.developer.nvidia.com/t/cannot-change-soc-gpio25-pp6-to-gpio-output-mode/381524/5 "2026-08-31T01:51:44Z")
Yeah, you’re good to go as long as you’ve verified the GPIO controller and pin number via `gpioinfo`. `gpiofind` is basically just a double-check to make sure you got the right pin. ---
**Author:** ![aespinoza1](https://developer.download.nvidia.com/images/forums/profile-default-devtalk-84.png) [@aespinoza1](https://forums.developer.nvidia.com/u/aespinoza1)\ **Post date:** [August 31, 2026, 5:46pm UTC](https://forums.developer.nvidia.com/t/cannot-change-soc-gpio25-pp6-to-gpio-output-mode/381524/6 "2026-08-31T17:46:22Z")
We have verified that we are toggling the right pin but still no physical output. What is the next trouble shooting steps from here? ---
**Author:** ![KevinFFF](https://sea2.discourse-cdn.com/nvidia/user_avatar/forums.developer.nvidia.com/kevinfff/32/15508_2.png) [@KevinFFF](https://forums.developer.nvidia.com/u/KevinFFF)\ **Post date:** [September 1, 2026, 7:33am UTC](https://forums.developer.nvidia.com/t/cannot-change-soc-gpio25-pp6-to-gpio-output-mode/381524/7 "2026-09-01T07:33:32Z")
Please apply the patch from the following thread since you are using JP6.2.1(r36.4.4) which does not include this fix. [40hdr - SPI1 gpio padctl register bit[10] effect by gpiod tools in JP6 - #20 by KevinFFF](https://forums.developer.nvidia.com/t/40hdr-spi1-gpio-padctl-register-bit-10-effect-by-gpiod-tools-in-jp6/301171/20) ---
**Author:** ![aespinoza1](https://developer.download.nvidia.com/images/forums/profile-default-devtalk-84.png) [@aespinoza1](https://forums.developer.nvidia.com/u/aespinoza1)\ **Post date:** [September 1, 2026, 5:17pm UTC](https://forums.developer.nvidia.com/t/cannot-change-soc-gpio25-pp6-to-gpio-output-mode/381524/8 "2026-09-01T17:17:15Z")
The pins we are trying to toggle aren’t in the 40 pin header would this still fix the issue? ---
**Author:** ![KevinFFF](https://sea2.discourse-cdn.com/nvidia/user_avatar/forums.developer.nvidia.com/kevinfff/32/15508_2.png) [@KevinFFF](https://forums.developer.nvidia.com/u/KevinFFF)\ **Post date:** [September 2, 2026, 3:31am UTC](https://forums.developer.nvidia.com/t/cannot-change-soc-gpio25-pp6-to-gpio-output-mode/381524/9 "2026-09-02T03:31:02Z")
That patch covers all GPIOs in the pinctrl-tegra driver, not just the 40-pin header. ---
**Author:** ![system](https://sea2.discourse-cdn.com/nvidia/user_avatar/forums.developer.nvidia.com/system/32/68080_2.png) [@system](https://forums.developer.nvidia.com/u/system)\ **Post date:** [September 23, 2026, 5:06am UTC](https://forums.developer.nvidia.com/t/cannot-change-soc-gpio25-pp6-to-gpio-output-mode/381524/11 "2026-09-23T05:06:53Z")
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