Can't exchange data between SoC and MCU on both Thor and Orin over SPI0

Autonomous Vehicles DRIVE AGX Thor DRIVE AGX Thor General
1

DRIVE OS Version: Provide DRIVE OS version. Example: 7.0.3

Issue Description:

Baud rate: 5000000
QSPI hardware unit: 0
CS line: 2
CS polarity: Low
Data shift edge: Leading
Data width: 32 bits
Transfer start: LS bit

According to the NVIDIA documentation, SPI0 with Chip Select 2 (CS2) is physically routed to the MCU.

However, only SPI0 with CS0 is exposed to user space. Since we cannot assert the required CS2 line, our transmitted data does not reach the MCU.

As a result, we receive 0xFF on the MISO line, confirming that the MCU is ignoring the transaction and idling. This indicates the SoC is toggling CS0, while the MCU is strictly waiting for the physical CS2 pin to toggle.

Note: Tested on both Orin (received 0xFF) & Thor (received 0x00). See below screen shots for details.

:/tmp$ ls -l /dev/spidev*
crw-------. 1 root root 153, 0 May 21 13:53 /dev/spidev0.0
crw-------. 1 root root 153, 1 May 21 13:53 /dev/spidev1.0

Note: Only .0 (CS0) is exposed to user space on both Thor and Orin HW.

Please let me know on how to control the CS2 line to communicate with MCU from SoC.

5

Let me confirm the feasibility and get back to you.

Could you share how you are doing the test?

6

Here are details:

SPI settings being applied:
Configuring SPI device : /dev/spidev0.0
Setting SPI mode to 1 | LSB First: 0x09
Setting bits_per_word : 32 bits
Setting bus speed : 5000000 Hz

32-bit Full-Duplex SPI Transfer:
Transmitting data: 0x80807788 0x88888080 0x00000000 - 12 bytes;
Received data : 0x00000000 0x00000000 0x00000000 - 12 bytes;

Please let me know if you need any further information.

7

Hi Siva,

Do you have any update this request?

Thanks!

8

Hi Siva,

Any inputs on this query?

Thanks!

9

Dear @dasari.sampath ,
There is no direct SPI access from guest VM and MCU. The /dev/spidev nodes are removed in next DevZone release.

10

Hi Siva,

Then how we can communicate with MCU from SOC over SPI. Please let me know any other alternative way to communicate from SOC to MCU over SPI.

11

Dear @dasari.sampath ,

It is not possible.

12

Hi Siva,

Okay! How can I access the following from SoC:

  1. QSPI (Quad SPI)
  2. KSPI (Keyed SPI)
  3. A2B Over SPI (Automotive Audio Bus)
13

@SivaRamaKrishnaNV :

Do you have any update on this query?

17

@SivaRamaKrishnaNV :

Do you have any update on this query?