Capture interlaced video from MIPI-CSI2

Dear Community,

We are implementing an ASIC based LVDS to MIPI-CSI2 bridge for an FCB camera having following outputs :

In order to answer the below question of the ASIC implementation service :

We need you confirm about “Interlaced input will interlace output . You need to make sure MIPI RX can recognize interlace as well”.

we would like to confirm if the Jetson Xavier NX (or any other Jetson) could support the capture of interlaced video, please ?

Thanks in advance and best regards,

Please reference to below topic.

Hi @ShaneCCC,

Thanks for the reference. From my searching in the forum, especially from the following discussion Camera of 960x480i do not work - #19 by ShaneCCC, I understand that interlaced input has only been supported in Jetson TX2 and TX2-NX (Nano was in progress of development but I am not sure about its status of today). Btw, when you said it was supported by TX2 (and the same for TX2-NX), did it mean that de-interlacing was also implemented in the driver ?

From the comment of your colleague in the reference link, I also understand that for Jetson platforms other than TX2 and TX2-NX, one could use CUDA to accelerate the de-interlacing the captured data in buffer by software.

Is my understanding correct ?

Thanks in advance and best regards,

Yes, suppose it only support by TX2 serial platform. But the reference topic makes it working on Orin.

Current don’t have native de-interlacing support for all Jetson platforms.


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