in TX1 carrer reset pin we were using 150 but i am not able to find carrer reset pin in TX2 EVK,any help will be appreciated.
i have to also add status of reset register what will be address of status register and its length on TX2
What does “150” mean? Are you testing on dev kit board? It is compatible carrier board between TX1 and TX2, it is same reset pin for both. Please describe your question in detail.
Actually i have a custom board that was previously on TX1 now we are moving to Tx2 with same board,in early init of uboot we were checking that carrer reset pin that was 150 for tx1,but internal gpio number has changed in tx1 and tx2,thats why i was asking what will be its pin number beacuse for carrer reset i didnot get any tegra pin in pin mux sheet or OEM guide.
There is no carrier reset signal on dev kit board, you can check the carrier board schematic here http://developer.nvidia.com/embedded/dlc/jetson-tx1-tx2-developer-kit-carrier-board-c02-design-files. I have no idea about the 150 on your custom board. If it is controlled by a GPIO, you should list the physical pin number of that GPIO on module connector.
ok so means to say in my custom design board,this carrer reset pin is signal to a gpio pin and we are handling that by reading the status of that gpio pin but that signal is not going anywhere in devkit,right?
What’s the physical pin number of this pin?
for TX1 it was PS6 in my custom board
PS6 of which connector? I don’t understand which pin of module connector you are using. It should be Ax, Bx…etc., on module connector, as you can see in J13 in P2597_C02 schematic. The system GPIOs are on that connector.
The GPIO3_PS.06 of TX1 is mapped to GPIO5 pin of board (D7 pin), GPIO5 pin of TX2 is mapped to GPIO3_PX.06
what about PV3 pin number of TX1,how it is mapped in TX2
Please get the physical pin number of PV3 in TX1 pinmux sheet, and so get the GPIO pin number by the same physical pin number in TX2 pinmux sheet. All pinmux sheet are in DLC: Jetson Download Center | NVIDIA Developer