Carrier Board Supplies must remain on During System Reset


I am currently developing a carrier board for the Jetson Orin Nano. I would like to have the ability to reset the Jetson Orin Nano without resetting the carrier board supplies. In order to do that, I have decided to not use SYS_RESET* as a power enable for my voltage regulators. How would I be able to achieve this goal?

No, the carrier power rails MUST be controlled by RESET. Please follow the DG well.

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Following up on this question,
When the system does a warm reset driven by an external signal pulling SYS_RST* low, we see that Power_EN stays high from the Jetson Orin Nano Dev Kit. Can the Carrier Board Power Rails remain on during this warm reset? Could you also provide some power sequence timing diagrams for warm resets?

We ask this because we have a SYS_RST* hold time of ~50 ms, the carrier board supplies may not be able fully power down in that short duration. Further more how dire is it that none of the I/O pins of the modules aren’t pulled high during a warm system reset? Is there any timing constraints or restrictions to this design rule?

Warm reset is ok as it only reset SoC and QSPI boot device. PMIC on module won’t be affected and so the module IO power status won’t be affected too.

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