cboot failure with L4T R32.2

Hi parashkev.penev,

Please using below command to flash on TX1 again:

cd /home/<username>/nvidia/nvidia_sdk/JetPack-4.2.1_Linux_GA_P2180/Linux_for_Tegra
sudo ./flash jetson-tx1 mmcblk0p1

Hello,

I tried to flash the board. Flash procedure completes successfully, but the board fails to boot with the same error as in the first post. Logs from the flash command and the serial window are below.

One thing worth mentioning is that the board in question is mounted on the ConnectTech Orbitty Carrier, but no modifications have been made otherwise to it or the carrier w.r.t. to the pin layouts.

flash_serial.log (9.17 KB)
flash_output.log (272 KB)

Hi,

Could you try to move your module to devkit and see if the issue is gone? The phandle 0xf1 is the GPIO expander tca9539 on our carrier board.

We need to investigate whether cboot change causes this problem.

Unfortunately, I do not own the devkit.

Is there a possibility/way to disable the probing of tca9539 that cboot does?

Could you also help share the cboot log with that carrier board on rel-28.3 release? I want to see if any clue. Thanks.

BTW, have you tried rel-32.1?

Please try remove below fragment in tegra210-jetson-cv-eeprom-manager.dtsi

bus@3 {
			i2c-bus = <&i2c7>;
			word-address-1-byte-slave-addresses = <0x54>;
			gpio-node = "/i2c@7000c400/tca9539@77";
			gpio-pin = <0x9>;
			bus-type = "i2cvi";
		};

and change the data-size = <0x100>; to 0x11

We have added some error handling in cboot. Please try with below binary.

If this cboot does not work, please try to methods in #9.

Also, I still wonder why rel-28 does not have such issue, so please kindly share your rel-28 log. Thanks!
cboot.tar.gz (232 KB)

Thank you Wayne,

I will provide the information tonight.

For the Cboot, what would be the correct procedure to update it on the board? Shall I just put in the nvidia_sdk/JetPack-4.2.1_Linux_GA_P2180/Linux_for_Tegra, replacing the original one and reflashing the board or is there a way to update only the cboot.

The updated cboot did the trick. I was able to get everything back up and running. As requested, attached are the flash and boot up serial logs from rel-28 as well as the serial logs with the new cboot.

Please let me know if any more logs or information is required and I will be glad to provide it.
cboot_update.log (78.3 KB)
l4t_28_boot.log (77 KB)
l4t_28_flash.log (165 KB)

It is 28.2 according to the Jetpack3.3_b39 install log.

08-17 17:43:44.6 N: Install com.nvidia.l4t.driver4os_64_tx1 28.2; Install com.nvidia.l4t.filesystem_64_tx1 28.2; Install com.nvidia.l4t.flash_64_tx1 28.2; 
08-17 17:43:45.7 N: /home/paro/JetPack3//InstallUtil setup /home/paro/JetPack3/ 599
08-17 17:43:45.7 N: InstallUtil setup return code0
08-17 17:44:50.5 N: Installing Drivers 28.2 succeeded.
08-17 17:46:51.3 N: Installing File System and OS 28.2 succeeded.
08-17 17:46:51.4 N: Installing Flash OS Image to Target 28.2 succeeded.

Sorry that please ignore my previous comment. I already deleted them.

Rel-28 already had that fix. As for the fix on rel-32, it would be included in next release.

Hi WayneWWW,
I also encountered this uboot error,

.
.
.
[0003.183] GPIO driver for phandle 0xf1 could not be found
[0003.189]
[0003.190] -----------------------------------------------
[0003.195] Synchronous Exception: DATA ABORT (FAR: 28)
[0003.200] -----------------------------------------------
[0003.206] PAR_ELX: 0x80b
[0003.208]
[0003.209] ESR 0x96000005: ec 0x25, il 0x1, iss 0x5
[0003.214] -----------------------------------------------
[0003.219]  [Stack Trace]
[0003.222]
[0003.223] => pc:0x92C0F058, sp:0x92CA2DD0
[0003.227] => pc:0x92C12710, sp:0x92CA3000
[0003.231] => pc:0x92C110D4, sp:0x92CA3040
[0003.235] => pc:0x92C0F27C, sp:0x92CA31E0
[0003.239] => pc:0x92C0BF1C, sp:0x92CA3310
[0003.243] => pc:0x92C032A8, sp:0x92CA3360
[0003.247] => pc:0x92C02A5C, sp:0x92CA33B0
[0003.250] => pc:0x92C02A30, sp:0x92CA33C0
[0003.254] -----------------------------------------------
[0003.260] iframe 0x92ca2ce0:
[0003.263] x0  0x               0 x1  0x               0 x2  0x        92ca12f8                                                                                                                                                              x3  0x              30
[0003.272] x4  0x               a x5  0x        92ca12f8 x6  0x              20                                                                                                                                                              x7  0x               1
[0003.281] x8  0x        83000000 x9  0x           21cdb x10 0x           21ccc                                                                                                                                                              x11 0x        92ca2fbc
[0003.291] x12 0x        83000000 x13 0x        92ca303c x14 0x        83000000                                                                                                                                                              x15 0x        92ca9158
[0003.300] x16 0x           ffff0 x17 0x           10000 x18 0x               0                                                                                                                                                              x19 0x               9
[0003.309] x20 0x        83000000 x21 0x               1 x22 0x        92ca0468                                                                                                                                                              x23 0x               5
[0003.319] x24 0x        92c5d000 x25 0x        92ca0000 x26 0x        92ca04ec                                                                                                                                                              x27 0x        92c9f1f8
[0003.328] x28 0x        92c5df72 x29 0x        92ca3000 lr  0x        92c0f054                                                                                                                                                              sp  0x        92ca2dd0
[0003.337] elr 0x        92c0f058
[0003.340] spsr 0x        60000309
[0003.344] -----------------------------------------------
[0003.349] panic (caller 0x92c01238): die
[0003.353] HALT: spinning forever...

And Replace Original cboot.bin with your Attachments cboot.bin!!
my problem resolved,but,I want to know,
What changes have been made to the cboot source that has caused the problem!!
Can we compile a modified cboot ourselves?

Hi,WaymeWWW
I also encountered this error.below is my boot log

[0000.162] [TegraBoot] (version 00.00.2018.01-l4t-89b97a49)
[0000.167] Processing in cold boot mode Bootloader 2
[0000.172] A02 Bootrom Patch rev = 255
[0000.176] Power-up reason: pmc por
[0000.179] No Battery Present
[0000.181] pmic max77620 reset reason
[0000.185] pmic max77620 NVERC : 0x40
[0000.188] RamCode = 0
[0000.190] Platform has Ddr4 type ram
[0000.194] max77620 disabling SD1 Remote Sense
[0000.198] Setting Ddr voltage to 1125mv
[0000.202] Serial Number of Pmic Max77663: 0x3424e5
[0000.210] Entering ramdump check
[0000.213] Get RamDumpCarveOut = 0x0
[0000.216] RamDumpCarveOut=0x0, RamDumperFlag=0xe59ff3f8
[0000.221] Last reboot was clean, booting normally!
[0000.226] Sdram initialization is successful
[0000.230] SecureOs Carveout Base=0x00000000ff800000 Size=0x00800000
[0000.236] Lp0 Carveout Base=0x00000000ff780000 Size=0x00001000
[0000.242] BpmpFw Carveout Base=0x00000000ff700000 Size=0x00080000
[0000.247] GSC1 Carveout Base=0x00000000ff600000 Size=0x00100000
[0000.253] GSC2 Carveout Base=0x00000000ff500000 Size=0x00100000
[0000.259] GSC4 Carveout Base=0x00000000ff400000 Size=0x00100000
[0000.265] GSC5 Carveout Base=0x00000000ff300000 Size=0x00100000
[0000.271] GSC3 Carveout Base=0x000000017f300000 Size=0x00d00000
[0000.287] RamDump Carveout Base=0x00000000ff280000 Size=0x00080000
[0000.293] Platform-DebugCarveout: 0
[0000.296] Nck Carveout Base=0x00000000ff080000 Size=0x00200000
[0000.302] Non secure mode, and RB not enabled.
[0000.306] Rail not supported
[0000.351] Csd NumOfBlocks=0
[0000.357] Using GPT Primary to query partitions
[0000.362] Loading Tboot-CPU binary
[0000.411] Verifying TBC in OdmNonSecureSBK mode
[0000.421] Bootloader load address is 0xa0000000, entry address is 0xa0000258
[0000.428] Bootloader downloaded successfully.
[0000.433] Downloaded Tboot-CPU binary to 0xa0000258
[0000.438] MAX77620_GPIO1 Configured.
[0000.441] MAX77620_GPIO5 Configured.
[0000.445] CPU power rail is up
[0000.447] CPU clock enabled
[0000.451] Performing RAM repair
[0000.454] Updating A64 Warmreset Address to 0xa00002e9
[0000.459] Loading NvTbootBootloaderDTB
[0000.486] Verifying NvTbootBootloaderDTB in OdmNonSecureSBK mode
[0000.627] Bootloader DTB Load Address: 0x83000000
[0000.632] Loading NvTbootKernelDTB
[0000.658] Verifying NvTbootKernelDTB in OdmNonSecureSBK mode
[0000.799] Kernel DTB Load Address: 0x83100000
[0000.804] Loading cboot binary
[0000.898] Verifying EBT in OdmNonSecureSBK mode
[0000.940] Bootloader load address is 0x92c00000, entry address is 0x92c00258
[0000.947] Bootloader downloaded successfully.
[0000.951] Next binary entry address: 0x92c00258
[0000.956] BoardId: 2180
[0000.973] Verifying SC7EntryFw in OdmNonSecureSBK mode
[0001.067] /bpmp deleted
[0001.069] SC7EntryFw header found loaded at 0xff700000
[0001.324] OVR2 PMIC
[0001.326] Bpmp FW successfully loaded
[0001.330] WB0 init successfully at 0xff780000
[0001.335] Set NvDecSticky Bits
[0001.338] GSC2 address ff53fffc value c0edbbcc
[0001.344] GSC MC Settings done
[0001.348] TOS Image length 53680
[0001.351] Monitor size 53680
[0001.354] OS size 0
[0001.360] Secure Os AES-CMAC Verification Success!
[0001.364] TOS image cipher info: plaintext
[0001.368] Loading and Validation of Secure OS Successful
[0001.384] SC7 Entry Firmware - 0xff700000, 0x4000
[0001.389] NvTbootPackSdramParams: start.
[0001.394] NvTbootPackSdramParams: done.
[0001.398] Tegraboot started after 141705 us
[0001.402] Basic modules init took 842608 us
[0001.406] Sec Bootdevice Read Time = 204 ms, Read Size = 8977 KB
[0001.412] Sec Bootdevice Write Time = 0 ms, Write Size = 0 KB
[0001.417] Next stage binary read took 12205 us
[0001.421] Carveout took -14913 us
[0001.424] CPU initialization took 450088 us
[0001.428] Total time taken by TegraBoot 1289988 us

[0001.433] Starting CPU & Halting co-processor

64NOTICE: BL31: v1.3(release):a28d87f09
NOTICE: BL31: Built : 16:52:46, Jul 16 2019
ERROR: Error initializing runtime service trusty_fast
[0001.557] RamCode = 0
[0001.572] LPDDR4 Training: Read DT: Number of tables = 10
[0001.577] EMC Training (SRC-freq: 204000; DST-freq: 408000)
[0001.583] EMC Training Successful
[0001.586] EMC Training (SRC-freq: 204000; DST-freq: 665600)
[0001.592] EMC Training Successful
[0001.595] EMC Training (SRC-freq: 204000; DST-freq: 800000)
[0001.606] EMC Training Successful
[0001.609] EMC Training (SRC-freq: 204000; DST-freq: 1065600)
[0001.632] EMC Training Successful
[0001.635] EMC Training (SRC-freq: 204000; DST-freq: 1331200)
[0001.657] EMC Training Successful
[0001.660] EMC Training (SRC-freq: 204000; DST-freq: 1600000)
[0001.679] EMC Training Successful
[0001.683] Switching to 800000 KHz Success
[0001.691] RamCode = 0
[0001.694] DT Write: emc-table@40800 succeeded
[0001.700] DT Write: emc-table@68000 succeeded
[0001.705] DT Write: emc-table@102000 succeeded
[0001.711] DT Write: emc-table@204000 succeeded
[0001.716] DT Write: emc-table@408000 succeeded
[0001.721] DT Write: emc-table@665600 succeeded
[0001.727] DT Write: emc-table@800000 succeeded
[0001.732] DT Write: emc-table@1065600 succeeded
[0001.738] DT Write: emc-table@1331200 succeeded
[0001.744] DT Write: emc-table@1600000 succeeded
[0001.748] LPDDR4 Training: Write DT: Number of tables = 10
[0001.797]
[0001.798] Debug Init done
[0001.800] Marked DTB cacheable
[0001.803] Bootloader DTB loaded at 0x83000000
[0001.808] Marked DTB cacheable
[0001.811] Kernel DTB loaded at 0x83100000
[0001.815] DeviceTree Init done
[0001.829] Pinmux applied successfully
[0001.833] gicd_base: 0x50041000
[0001.837] gicc_base: 0x50042000
[0001.840] Interrupts Init done
[0001.845] Using base:0x60005090 & irq:208 for tick-timer
[0001.850] Using base:0x60005098 for delay-timer
[0001.854] platform_init_timer: DONE
[0001.858] Timer(tick) Init done
[0001.862] osc freq = 38400 khz
[0001.867]
[0001.868] welcome to cboot
[0001.870]
[0001.871] Cboot Version: 00.00.2018.01-t210-3a168c35
[0001.876] calling constructors
[0001.879] initializing heap
[0001.882] initializing threads
[0001.885] initializing timers
[0001.888] creating bootstrap completion thread
[0001.892] top of bootstrap2()
[0001.895] CPU: ARM Cortex A57
[0001.898] CPU: MIDR: 0x411FD071, MPIDR: 0x80000000
[0001.903] initializing platform
[0001.906] Scratch reg 37 & 271 initial value set…
[0001.913] cboot:secure-pmc present
[0001.987] config for ddr50 mode completed
[0001.990] sdmmc bdev is already initialized
[0001.995] Enable APE clock
[0001.997] Un-powergate APE partition
[0002.001] of_register: registering tegra_udc to of_hal
[0002.006] of_register: registering tegra_udc to of_hal
[0002.011] of_register: registering inv20628-driver to of_hal
[0002.017] of_register: registering ads1015-driver to of_hal
[0002.022] of_register: registering lp8557-bl-driver to of_hal
[0002.028] of_register: registering bq2419x_charger to of_hal
[0002.033] of_register: registering cpc to of_hal
[0002.038] of_register: registering bq27441_fuel_gauge to of_hal
[0002.052] gpio framework initialized
[0002.055] of_register: registering tca9539_gpio to of_hal
[0002.061] of_register: registering tca9539_gpio to of_hal
[0002.066] of_register: registering i2c_bus_driver to of_hal
[0002.071] of_register: registering i2c_bus_driver to of_hal
[0002.077] of_register: registering i2c_bus_driver to of_hal
[0002.083] of_register: registering i2c_bus_driver to of_hal
[0002.088] pmic framework initialized
[0002.092] of_register: registering max77620_pmic to of_hal
[0002.097] regulator framework initialized
[0002.101] of_register: registering tps65132_bl_driver to of_hal
[0002.107] initializing target
[0002.113] gpio_driver_register: register ‘tegra_gpio_driver’ driver
[0002.123] fixed regulator driver initialized
[0002.165] initializing OF layer
[0002.168] NCK carveout not present
[0002.171] Skipping dts_overrides
[0002.176] of_children_init: Ops found for compatible string nvidia,tegra210-i2c
[0002.197] I2C Bus Init done
[0002.200] of_children_init: Ops found for compatible string nvidia,tegra210-i2c
[0002.211] I2C Bus Init done
[0002.214] of_children_init: Ops found for compatible string ti,tca9539
[0002.225] tca9539_init: i2c bus: 2, slave addr: 0xe8
[0002.230] I2C slave not started
[0002.233] I2C write failed
[0002.235] i2c write failed
[0002.238] Slave: 0xe8, Register 0x4 Instance 2, Buffer Size: 0
[0002.244] tca9539_device_init: failed to write polar reg
[0002.249] tca9539_init: failed to init device!
[0002.253] of_children_init: Ops found for compatible string ti,tca9539
[0002.264] tca9539_init: i2c bus: 2, slave addr: 0xee
[0002.269] I2C slave not started
[0002.272] I2C write failed
[0002.275] i2c write failed
[0002.277] Slave: 0xee, Register 0x4 Instance 2, Buffer Size: 0
[0002.283] tca9539_device_init: failed to write polar reg
[0002.288] tca9539_init: failed to init device!
[0002.293] of_children_init: Ops found for compatible string nvidia,tegra210-i2c
[0002.304] I2C Bus Init done
[0002.307] of_children_init: Ops found for compatible string nvidia,tegra210-i2c
[0002.318] I2C Bus Init done
[0002.321] of_children_init: Ops found for compatible string nvidia,tegra210-i2c
[0002.333] I2C Bus Init done
[0002.335] of_children_init: Ops found for compatible string maxim,max77620
[0002.347] max77620_init using irq 118
[0002.352] register ‘maxim,max77620’ pmic
[0002.356] gpio_driver_register: register ‘max77620-gpio’ driver
[0002.362] of_children_init: Ops found for compatible string nvidia,tegra210-i2c
[0002.374] I2C Bus Init done
[0002.378] NCK carveout not present
[0002.381] shim_invoke: No NCT, Calling dts updates
[0002.395] Find /i2c@7000c000’s alias i2c0
[0002.399] get eeprom at 1-a2, size 256, type 0
[0002.404] get eeprom at 1-ae, size 256, type 0
[0002.415] Find /i2c@7000c400’s alias i2c1
[0002.418] get eeprom at 2-a0, size 256, type 0
[0002.429] Find /i2c@7000c500’s alias i2c2
[0002.433] get eeprom at 3-a0, size 256, type 0
[0002.438] get eeprom at 3-ae, size 256, type 0
[0002.446] Find /host1x/i2c@546c0000’s alias i2c6
[0002.451] get eeprom at 7-a8, size 256, type 0
[0002.455] pm_ids_update: Updating 1,a2, size 256, type 0
[0002.461] I2C slave not started
[0002.464] I2C write failed
[0002.466] Writing offset failed
[0002.469] eeprom_init: EEPROM read failed
[0002.473] pm_ids_update: eeprom init failed
[0002.477] pm_ids_update: Updating 1,ae, size 256, type 0
[0002.483] I2C slave not started
[0002.486] I2C write failed
[0002.488] Writing offset failed
[0002.491] eeprom_init: EEPROM read failed
[0002.495] pm_ids_update: eeprom init failed
[0002.499] pm_ids_update: Updating 2,a0, size 256, type 0
[0002.505] I2C slave not started
[0002.508] I2C write failed
[0002.510] Writing offset failed
[0002.513] eeprom_init: EEPROM read failed
[0002.517] pm_ids_update: eeprom init failed
[0002.521] pm_ids_update: Updating 3,a0, size 256, type 0
[0002.552] pm_ids_update: The pm board id is 2180-1000-401
[0002.559] Adding plugin-manager/ids/2180-1000-401=/i2c@7000c500:module@0x50
[0002.567] pm_ids_update: pm id update successful
[0002.571] pm_ids_update: Updating 3,ae, size 256, type 0
[0002.577] I2C slave not started
[0002.580] I2C write failed
[0002.582] Writing offset failed
[0002.585] eeprom_init: EEPROM read failed
[0002.589] pm_ids_update: eeprom init failed
[0002.593] pm_ids_update: Updating 7,a8, size 256, type 0
[0002.600] GPIO driver for phandle 0xf1 could not be found
[0002.605]
[0002.606] -----------------------------------------------
[0002.612] Synchronous Exception: DATA ABORT (FAR: 28)
[0002.617] -----------------------------------------------
[0002.622] PAR_ELX: 0x80b
[0002.624]
[0002.626] ESR 0x96000005: ec 0x25, il 0x1, iss 0x5
[0002.630] -----------------------------------------------
[0002.636] [Stack Trace]
[0002.638]
[0002.639] => pc:0x92C0F058, sp:0x92CA2DD0
[0002.643] => pc:0x92C12710, sp:0x92CA3000
[0002.647] => pc:0x92C110D4, sp:0x92CA3040
[0002.651] => pc:0x92C0F27C, sp:0x92CA31E0
[0002.655] => pc:0x92C0BF1C, sp:0x92CA3310
[0002.659] => pc:0x92C032A8, sp:0x92CA3360
[0002.663] => pc:0x92C02A5C, sp:0x92CA33B0
[0002.667] => pc:0x92C02A30, sp:0x92CA33C0
[0002.671] -----------------------------------------------
[0002.676] iframe 0x92ca2ce0:
[0002.679] x0 0x 0 x1 0x 0 x2 0x 92ca12f8 x3 0x 30
[0002.688] x4 0x a x5 0x 92ca12f8 x6 0x 20 x7 0x 6
[0002.698] x8 0x 83000000 x9 0x 21cdb x10 0x 21ccc x11 0x 92ca2fbc
[0002.707] x12 0x 83000000 x13 0x 92ca303c x14 0x 83000000 x15 0x 92ca9158
[0002.716] x16 0x ffff0 x17 0x 10000 x18 0x 0 x19 0x 9
[0002.726] x20 0x 83000000 x21 0x 1 x22 0x 92ca0468 x23 0x 5
[0002.735] x24 0x 92c5d000 x25 0x 92ca0000 x26 0x 92ca04ec x27 0x 92c9f1f8
[0002.744] x28 0x 92c5df72 x29 0x 92ca3000 lr 0x 92c0f054 sp 0x 92ca2dd0
[0002.753] elr 0x 92c0f058
[0002.757] spsr 0x 60000309
[0002.760] -----------------------------------------------
[0002.765] panic (caller 0x92c01238): die
[0002.769] HALT: spinning forever…

WayneWWW,
please help me!!!

Sorry that currently there is no cboot source for rel-32.x. Please just use the binary in previous link.

This error is simple, if your carrier board does not use tca9539, then cboot would still goes into gpio driver to find a non-existing node. We just avoid it by putting some error handle inside.

hello WayneWWW,
thanks for your help,

One of your coworkers at this link
https://devtalk.nvidia.com/default/topic/1048753/jetson-nano/r32-1-cboot-source/post/5362950/#5362950
said Source Cboots has been released for R32.2!!

My question is if I remove the fragment in tegra210-jetson-cv-eeprom-manager.dtsi
According to this
https://devtalk.nvidia.com/default/topic/1061339/jetson-tx1/cboot-failure-with-l4t-r32-2/post/5375252/#5375252
,the problem solved ?? Without replacing cboot ??

hhami.2040,

Currently, the cboot source (rel-32.x) is only for TX2/Xavier but not ready for nano.
Why you cannot replace cboot for this issue?

Hello WayneWWW ,
thank you very much,
using your hint,
https://devtalk.nvidia.com/default/topic/1061339/jetson-tx1/cboot-failure-with-l4t-r32-2/post/5375252/#5375252
without replace your cboot.bin,my problem is solved,

only a question,cboot source (rel-32.x) no ready for TX1??
When do you think it will be released?

Hello WayneWWW, thank you very much. With your cboot.bin,my problem is fixed! my tx1 works well!