Hi all,
have you already heard about a chamfer distance implemented on gpu (cuda or other)?
(chamfer distance = discrete approximation of eulerian distance)
Classical, cpu algorithms are not easy to translate to CUDA (they are based on the execution order).
I found a few descriptions of parallel chamfer mask algos but they seem all based on an execution order anyway…
At least if someone has information about an algo that could be translated in CUDA.
Thanks.
– pium, frustrated to have a big, complex chain of image processings with only one algo executed on cpu that takes more than 50% of the execution time…
EDIT: I just found that External Image The Official NVIDIA Forums | NVIDIA