Change atf console log uart

Arm TrustFirmware’s console log is shown on the shared console (ttyUSB3) on Jetpack Xavier AGX devkit.
I want to redirect it to other uart. (e.g., /dev/ttyUSB0, /dev/ttyUSB1 or any other)
I tried with ENABLE_CONSOLE_SPE as 0 in
but I can’t see atf console log in any ttyUSBx.
What shall I do?

hello goodsj,

may I know what’s your use-case to separate the logs?
it’s Xavier series to having combined uart feature to output all logs to the same port.

I’d like to debug ATF (to configure pcie).
I guess the log is not shown after LK start on shared uart console.

hello goodsj,

could you please gather the uart logs for reference, thanks

Hello JerryChang,
I added pcie base address memory region to tegra_mmap and not sure it accessed or not because I can’t check the log.

    MAP_REGION_FLAT(0x14100000, 0x20000,
                    (uint8_t)MT_DEVICE | (uint8_t)MT_RW | (uint8_t)MT_SECURE),

The log is below. I set DEBUG=1 and LOG_LEVEL=50.

[0050.029] I> tos: Authentication Finalize Done
[0050.034] I> oem authentication of bpmp-fw-dtb header done
[0050.038] I> bpmp-fw-dtb: Authentication init Done
[0050.043] I> parsing oem signed section of cpubl-dtb header done
[0050.050] I> cpubl-dtb binary copied from blob
[0050.053] I> bpmp-fw-dtb: Authentication Finalize Done
[0050.242] I> oem authentication of cpubl-dtb header done
[0050.242] I> cpubl-dtb: Authentication init Done
[0050.243] I> cpubl-dtb: Authentication Finalize Done
??INFO: MCE Version - HW=6:7, SW=6:7
INFO: BL3-1: Boot CPU: Denver Processor [80000000]
VA:0x100000 PA:0x100000 size:0x4000 attr:0x8
VA:0x2000000 PA:0x2000000 size:0x20000 attr:0x8
VA:0x2610000 PA:0x2610000 size:0x10000 attr:0x8
VA:0x2c00000 PA:0x2c00000 size:0x8000 attr:0x8
VA:0x2c10000 PA:0x2c10000 size:0x8000 attr:0x8
VA:0x3520000 PA:0x3520000 size:0x2000 attr:0x8
VA:0x3820000 PA:0x3820000 size:0x1000 attr:0x8
VA:0x3881000 PA:0x3881000 size:0x1000 attr:0x8
VA:0x3882000 PA:0x3882000 size:0x1000 attr:0x8
VA:0x3ac0000 PA:0x3ac0000 size:0x1000 attr:0x8
VA:0x3ad0000 PA:0x3ad0000 size:0x1000 attr:0x8
VA:0x3ae0000 PA:0x3ae0000 size:0x1000 attr:0x8
VA:0x3c90000 PA:0x3c90000 size:0x1000 attr:0x8
VA:0xc198000 PA:0xc198000 size:0x1000 attr:0x8
VA:0xc2e0000 PA:0xc2e0000 size:0x10000 attr:0x8
VA:0xc390000 PA:0xc390000 size:0x1000 attr:0x8
VA:0x10000000 PA:0x10000000 size:0x800000 attr:0x8
VA:0x11000000 PA:0x11000000 size:0x800000 attr:0x8
VA:0x12000000 PA:0x12000000 size:0x800000 attr:0x8
VA:0x14100000 PA:0x14100000 size:0x20000 attr:0x8
VA:0x20000000 PA:0x20000000 size:0x10000 attr:0x8
VA:0x40000000 PA:0x40000000 size:0xe000 attr:0x2
VA:0x4000e000 PA:0x4000e000 size:0x3000 attr:0x22
VA:0x40011000 PA:0x40011000 size:0x22000 attr:0xa
VA:0x4004c000 PA:0x4004c000 size:0x10000 attr:0x8
VA:0xebc00000 PA:0xebc00??

welcome to lk
calling constructors
initializing heap
??8??creating bootstrap completion thread
top of bootstrap2()
initializing platform
bpmp: platform_init
tag is e73a758761f0c6d24a1e69a2ac6b5035
tag_show initialized
dt initialized
mail initialized

cvc_debugfs initialized
dmce_debugfs initialized
ec_debugfs initialized
rm_debugfs initialized
soctherm_debug initialized
gr_reader initialized
mods initialized
dt_fs initialized
debugfs_mrq initialized
debug_mrq initialized
debug_safereg initialized
initializing target
calling apps_init()
starting app shell
entering main console loop

Thanks !

hello goodsj,

you’re building ATF image, (i.e. bl31.bin) by your own, right?
had you also take the ATF image (and Trusty image) by using the python script, to generate the tos.img?
you should also perform the partition update to burn secure-os partition for verification,
for example, $ sudo ./ -k secure-os jetson-xavier mmcblk0p1

Hi JerryChang,
Right, I used that I build and flash it with the scripts.

hello goodsj,

I’ve revisit your logs, and your pcie base address 0x14100000 is allocated,
for example,

VA:0x14100000 PA:0x14100000 size:0x20000 attr:0x8

you may also refer to tegra_def.h for the specific platform definitions.
there’re base address you may check as see-also.

Hello JerryChang,

AGX can support shared uart only?

Thank you.

hello goodsj,

here’s discussion thread Topic 160948, which share some changes for disabling combined uart on Jetson AGX Xavier.

Hello JerryChang,

Atfer disabling shared console, if I use UARTA then how can I connect ?
Can I still use ttyUSBx via USB cable or need some pins on 40-Pin connector?


hello goodsj,

you may disassembler the dtb file into text file and check the mappings.
please also check below sources for reference,
for example, uartc: serial@c280000 {...}

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