Change the device tree for DisplayPort on DP1?


Okay, that sounds good!

Just for better understanding, that I do not break anything:

  • I take back patch 1 and 2.

  • I recompile the kernel and dp files and load them back into the jetson nano.

  • How can directly change the content of the address 0x7000319c?

Or should I do something like this:

nvidia,lpdr = <TEGRA_PIN_ENABLE>;

Or is there also a direct write function for hadware registers ?

Thank you!

I take back patch 1 and 2.
I recompile the kernel and dp files and load them back into the jetson nano.

Yes, just the status when we didn’t force the hotplug status.

nvidia,lpdr = <TEGRA_PIN_ENABLE>;

Configuring this in pinmux dts is also fine. But we are going to disable lpdr but not enable.

perfect, then I’ll implement that right away

Oh yes you are right

Ok, I have now removed patch 1 and 2 and installed nvidia,lpdr = <TEGRA_PIN_DISABLE>;

The sudo busybox devmem 0x7000319c output is now: 0x00000040

The dmesg log looks like this:

dmesg_output_2021-07-13_17-00-03.log (55.0 KB)

The screen remains dark…

Hi WayneWWW,
I was still working on another project until today.
Now I try further to solve the DP problem.

We’re checking with our dev team to give comments.

I am very grateful for any help!


Sorry for late reply. Just want to confirm these again.

  1. Can you share your current dts file?

  2. Do you see any signal assert/deassert on the HPD pin when you insert the cable?


Of course with pleasure.
Here is the current .dts file:

dts_file_output_01.09.2021.txt (325.7 KB)

In the demsg log I can not see any change?

dmesg_output_2021-09-01_20-03-32.log (57.8 KB)

but i see a change under:

cat tegra_gpio

@ At Devkit
Just for comparison again at the Devkit → the line looks like this;

CC: 7:0 92 80 80 02 00 12 121200

Nothing changes here when switching the display on and off

Hi @ElectronicSystems ,

I mean the hardware signal on that pin. Not something that is shown in the software.

Also, just want to confirm again that

No matter hotplug in/out, there is no new dmesg from your log, right?

Hi WayneWWW,

I have now inserted a jumper between PIN20 and PIn18 on the Displayport connector for 100% testing of the Hot Plug Detect Pin:

The result is the hardware works 100% correctly!

Bridge inserted between PIN 18 and PIN 20:
CC: 7:0 92 80 80 02 00 10 101000

Bridge between PIN 18 and PIN 20 open
CC: 7:0 92 80 80 00 00 10 101000

So, as soon as I connect the bridge between PIN 18 and PIN 20, Hot Plug is detected. But not displayed in dmesg!

Can you change the nvidia,out-flags in your dp-display to 2 here and see if any difference?

Okay, I set nvidia,out-flags to 2 and checked what changes.
Unfortunately nothing has changed. Here is the current dmesg log.

output_2021-09-03_17-55-32.log (55.0 KB)

I will be able to check everything again next week, I have more time.

Thank you very much!


Can you use the default setting (out-flags to original one) and measure the HPD on the Nano side with a voltmeter to confirm that the signal that goes to T210 is actually high?


okay i will check it out.


I have tested the voltage at T210 pin 96.

→ With the display plugged in 1.8V is present.
→ When the display is not plugged in, 0.0V is present.

So the hardware works 100 percent!

This also showed:

What still deviates now is yes:

@ At the Devkit
CC: 7:0 92 80 80 02 00 12 121200

@ With my board:
CC: 7:0 92 80 80 02 00 10 101000

Can you explain again how a Hot Plug Detect is detected.
I would like to add some debug printouts to the source code.

Decisive are the files:
dpaux.c and of_dc.c

As an example: I have in the function parse_disp_default_out() (from of_dc.c)
a debug print printk(“DEBUG of_dc.c → hotplug-gpio =%i\n”,hotplug_gpio); built-in

If I plug in or unplug the display the function parse_disp_default_out() is not called. No debug print is generated.

so I assume that the HPD is not recognized in the dpaux.c?

Or how do I have to imagine that?


Please just wait. I need some internal discussion with our hardware guys.

all right, I’ll wait.