Hi there a question. What is wrong with :
cqCommandQueue = clCreateCommandQueue(cxGPUContext, devices[device], CL_QUEUE_OUT_OF_ORDER_EXEC_MODE_ENABLE, NULL);
&
ciErrNum = clEnqueueWriteBuffer(cqCommandQueue, cmDevData, CL_TRUE, 0, memSize, h_data, 0, NULL, NULL);
I get an invalid queue from the code… the queue is created right? If I ommit the out of order it works just fine.
Alex.
No answer to this? For instance it is not just kernel execution out of order in a CPU. What I wanted to test is whether I can do three simultenous memory transfers and take advantage of the channels that DDR3 offer. In order to do this the queue need to be fed with three memory buffers and the queue need to execute the commands out of order. I was wondering whether this can be achieved. Getting an invalid queue strikes to me as extremely odd.