Clock signals for 6 camera interfce with Jetson Xavier NX

Robotics & Edge Computing Jetson Systems Jetson AGX Xavier
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1

Hello,

I have a doubt in hw design of 2 lane CSI with 6 CSI cameras. The MCLK can be shared is an option an other is looking for clock buffer.

I am not sure what kind of clock buffer to look for, I need suggestions on it.

For PWR_DWN GPIO will be using I2C to GPIO converter to extend from 2 to 6. Is this correct or anything wrong here.

Thanks

3

For the 6 cameras would suggest using i2c expander to expand.

Please check the design guide for the detail.

Thanks

4

Okay, got it. How do we control it any idea on that part ?
And the MCLK signals are only 4, for the remaining two how to use it?
It’s suggested to use clock buffer I am unsure on how to proceed. I have selected CDCLVC1104PWR as the buffer is this correct ?
Will be using CAM1_MCLK as input to the buffer and 5 cameras MCLK from the buffer, remaining one will be coming from CAM0_MCLK.
Any suggestion on this