Hi,
I noticed that in the Orin Nano DevKit schematics, there are no CMCs on SS lanes for the recovery port (TypeC) but only for the USB2 DP/DN signals.
Is there a reason for it? For the USB3 devices, the schematics does include the CMC for all USB lines.
Thanks,
Matan
Not sure which schematic did you read there.
There is USB3 signal just above the USB2 signal in the page 13 of P3768_A04 Concept schematics.
Of course.
I asked if there is any reason that there are no common-mode-chokes on the SSTX/SSRX lanes, but only on the USB2 Dp/Dn lines.
Ok. Sorry that I didn’t read your question correctly. Our hardware eng will reply your question in the workday.
Please refer to the Jetson Orin NX Series and Orin Nano Series Design Guide https://developer.nvidia.com/downloads/jetson-orin-nx-series-nano-series-design-guide
Thanks, sgursal.
I’ve seen that. To reserve place holder is good idea.
My question was why in the Orin Nano DevKit in the super speed lanes of the USBC - there are no common-mode-chokes placeholders, while there are placeholders for the USB Type-A devices.
- Why here you didn’t implement place holders for CMC and the super speed signals are connected directly to the USB3.2 Switch, while in the schematics of the DevKit, there are placeholders to CMC on super speed lines?
- Where is this snapshot taken from? I couldn’t find it in the Design Guidelines (I’m using version 1.4)
- CMC are not recommended for USB SS signals. However, if you think your design needs them you can add them.
- Sorry, this snapshot is from AGX Orin Design Guide
I understand. I was confused by the fact that in some places in the DevKit you implemented placeholders for CMC and in other places didn’t.
In any case, from the Design Guide:
This specific P/N from TDK is EOL.
Please check for replacement equivalent or better parts with component vendor/s.
EOL is announced. You can still buy it https://product.tdk.com/en/search/emc/emc/cmf_cmc/info?part_no=ACM2012D-900-2P-T00
