I am planning the peripheral connections to my Orin Nano dev kit but I’ve found conflicting specifications.
Reading the document:
Jetson_Orin_Nano_DevKit_Carrier_Board_Specification_SP-11324-001_v1.1.pdf
section 2.1 tells me each stack can provide 3 A. I think that value is a typo. Figure 5.1 illustrates that each of the three stacks has its own load switch, and calls out the AP22811.
The data sheet for the AP22811 indicates a 2 A power limit.
Looking for some corroboration, I checked the reference design files in Jetson_Orin_Nano_DevKit_Carrier_Board_Reference_Design_Files_A04_20230320.zip
Both
P3768_A04_Concept_schematics.pdf
and
P3768_A04_BOM.xls
call out the AP22811 and/or mention the 2 A limit.
Seeing so much agreement in the design documentation, it looks like this is probably an error in the carrier board specification document. I think I’ve got what I need for my planning but thought I’d pass it along so section 2.1 of that document can be corrected:
The max power delivery is 2 A at each of the three USB stacks (counting the USB-C as one stack).
If I’ve missed something, I’d appreciate clarification.