Conflicting specifications for USB power limits in Orin Nano Dev Kit

I am planning the peripheral connections to my Orin Nano dev kit but I’ve found conflicting specifications.

Reading the document:
Jetson_Orin_Nano_DevKit_Carrier_Board_Specification_SP-11324-001_v1.1.pdf

section 2.1 tells me each stack can provide 3 A. I think that value is a typo. Figure 5.1 illustrates that each of the three stacks has its own load switch, and calls out the AP22811.

The data sheet for the AP22811 indicates a 2 A power limit.

Looking for some corroboration, I checked the reference design files in Jetson_Orin_Nano_DevKit_Carrier_Board_Reference_Design_Files_A04_20230320.zip

Both
P3768_A04_Concept_schematics.pdf
and
P3768_A04_BOM.xls
call out the AP22811 and/or mention the 2 A limit.

Seeing so much agreement in the design documentation, it looks like this is probably an error in the carrier board specification document. I think I’ve got what I need for my planning but thought I’d pass it along so section 2.1 of that document can be corrected:
The max power delivery is 2 A at each of the three USB stacks (counting the USB-C as one stack).

If I’ve missed something, I’d appreciate clarification.

Hi, the Ilimit is up to 3.2A.

Hi Trumany,

thanks for the quick reply. What is your source for that number?

The data sheet of AP22811.

Hi Trumany, looking again at the AP22811 datasheet, I think I see where you are coming from.

So the recommended operating point is 2 A but the device won’t go into overload/shutdown until at least 2.2 A and there is a chance it will be able to deliver 3.2 A before shutting off.

Did I understand you correctly?

Yes, I think so.

Okay, so it seems like we agree the Dev Kit spec sheet is incorrect. The limit is clearly not 3 A per stack, as stated in the carrier board spec sheet v1.1. The value to change it to depends on whether NVIDIA prefers to give the assured performance limit (2.2 A) or the limit some people might see some of the time (3.2 A).

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