Control NVMe while not operating as root complex

I wanted to ask if its possible for the AGX Orin to control an external NVMe while the AGX is not the Root Complex in that PCIe fabric.


Not possible. Also, the RC or RP is in each PCIe controller, no the whole Orin AGX.

Thank you for your answer.
Can you please briefly elaborate on

  1. Why its not possible
  2. Why its relevant that the RC/RP property is in each controller separately and not in the whole Orin AGX?

I’m asking for learning purposes.
Thanks again

  1. Our driver and hardawre can work in either EP mode or RP mode. No such thing to work at same time.

  2. Orin PCIe has many controllers. For example, you can put C5 in EP mode but C4 in RP mode.

  1. So theoretically from what you just said, I can set the hardware to work as EP (driver as well). In this case why its not possible to control the NVMe (filesystem)

My point is if you want to use just one PCIe controller to be EP and RP at same time, then it is not possible.

This already answered your question… what is the exact thing you you want to ask here?

Your question only indicates you don’t understand the concept of RP and EP here.

My question is why I can’t configure all Orin AGX PCIe controllers as EPs and still manage the NVMe filesystem from one of these EPs.

You’re right, I’m not familiar with PCIe material, that’s why I asked if its ok to get a brief explanation (to point me in the right direction).
Thank you for your patience.

When you set Orin PCIe controller as EP, other host PC or RP will see Orin as a PCIe device. Orin will be same as another PCIe device. In that point, it will not be able to detect the SSD you connect on same controller…

But actually you won’t configure “every” PCIe controller on Orin to be EP mode because we didn’t support all of them could be EP mode…

I know that PCIe is a point to point protocol. I thought this fact says that any two devices can communicate with each other (point to point right?)

Now I learned that only RC - EP can communicate directly and that if two EPs wish to communicate, the RC must be involved in between.

Thank you.

The concept here is not related to Jetson but common PCIe protocol.

You could search more info on the Internet.

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