core board redesign

CEI SoM or Avionic CoM or sparkle are really cool. It’s still big for our application.
It is possible to redesign it to 58mm×38mm, with just IO 2 MIPI x4 Lane and one serial.
Power board should be shrinked to smaller than core board. Leave a contact if you can.

How much DRAM is required? While it may not be impossible, it’s unlikely. Around 4000mm^2 is more typical (including power circuitry).