I am trying to make use of the Coresight components of the Terga K1 SoC, however, I cannot really enable them. The Terga K1 SoC TRM tells that the Secure Boot Processor Feature Configuration Register located at address 0x6000c208 controls the debug signals, but writing to the [4:0] bits of this register does not work.
I am using the Nexus 9 which is integrated with Terga K1 SoC, I wrote a kernel module to write to the Secure Boot Processor Feature Configuration Register. When I try to read back the value after the writing, I found that the value does not change at all. Does any one happen to know what the problem is?
Thanks for any help and discussion!