Could AGX Xavier set PCIe #1 as endpoint and set PCIe #2 as host at same time?
What does PCIe#1 and PCIe#2 stand for here? Which pin is connected? Which controller is in use?
PCIe#1 will use controller #0
PCIe#2 will use controller #4 ;
Then it could be okay.
I found a description as following shown in design guide P.47 yesterday.
“Endpoint mode is supported on Interface C5 only”
Could you help to confirm it ?
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