We are using a board based on the Tegra K1 SOC (With kernel R21.5).
An HDMI to CSI2 bridge is connected to this board.
We configure the HDMI to CSI2 bridge to send HDMI data on 4 data lanes + 1 clk lane, using those pins
As CSI_A and CSI_B has 2 lanes each one,
How can we retrieve data received on the lanes of CSI_A and CSI_B , using a single vi V4L2 input device ?