Hi All,
In file, drivers/media/platform/tegra/mipical/mipi_cal.c,
In function, tegra_mipi_wait(), calibration registers are used. For e.g. CIL_MIPI_CAL_STATUS and
CIL_MIPI_CAL_STATUS_2.
Offset for these registers in code:
#define CIL_MIPI_CAL_STATUS 0x08
#define CIL_MIPI_CAL_STATUS_2 0x0c
In TRM, the offset is:
MIPI_CAL_CIL_MIPI_CAL_STATUS_0
CIL MIPI Calibration Status
Offset: 0xc | Read/Write: RO | Reset: 0xXXXXXXXX
29.2.5 MIPI_CAL_CIL_MIPI_CAL_STATUS_2_0
MIPI CLK Calibration Status 2
Offset: 0x10 | Read/Write: RO | Reset: 0x000000XX
In code and TRM, calibration registers offset differs. Which one is proper value?
-Thanks.