CSI Interface Sampling edge? Positive or Negative edge of Clock?

We have used camera sensors and sensor interface connected to TX1,
Camera sensors are configured to use falling edge of MIPI_CLK to generate MIPI Bus.

What edge of MIPI_CLK will be used by TX1 CSI receiver? I could not see it is programmable in MIPI registers in Technical reference manual.

Please let us know setup and hold time requirements of TX1 CSI receiver.

Appreciated quick response

It is differential signal for CSI. What is the meaning of “edge”? Please check MIPI D-PHY spec for detail.