Custom cameralink to CSI-2 fpga device driver for 640x480 sensor

The camera is a cameralink camera that is 640x480 with a 144MHz pixel clock. This is connected to an FPGA that uses a Xilinx csi-2 IP. The FPGA streams data from the camera to 1 lane of the csi-2 with short packets at the beginning of the frame and the end of the frame. The FPGA simply begins streaming once instantiated. A driver was created from the sources of the IMX219 camera. I have disabled the plugin-manager in the device tree and added the device tree for the new camera. I have tried to populate the parameters in the device tree file as well as the mode_tables in the header file the best I could, but I do not have any of the information that is requested. The problem seems to be the line_length and frame_length. I am not sure how to properly set these values.
The driver binds the device to /dev/video0 properly and most ioctls seem to be working. There is an error generated by each frame (found in kern.log). This is not allowing VIDIOC_DQBUF.
Any help would be appreciated.

tam640.tar.gz (55.6 KB)

Below message tell the error of CSI_CSI_PIXEL_PARSER_A_STATUS_0,

HPA_UNC_HDR_ERR: Uncorrectable Header Error. Set when header parser A parses a header with a
multi bit error. This error will be detected by the headers ECC, but can’t be corrected. The packet will be

Jul 27 11:02:53 t-desktop kernel: [ 415.516224] vi tegra_channel_error_status:error 4000 frame 0

Are you referring to the 32 bit header in the attached image? This is out of the CSI-2 specification. This would be incorrect in the FPGA right?


I am check the tegra TRM for the REG CSI_CSI_PIXEL_PARSER_A_STATUS_0

Thanks for getting back to me. I have been looking around in the sources adding printk statements to output some of the variables - mainly in the vi2_fops.c file. I have the following being set:
height 480
width 640
format 32 (not sure what this is)
data type 0x2C (RAW12)
word count 960
These seem to be set proper from the header. Can you point me in the direction where the parser error is coming from? In the method, it tests for chan->pg_mode and this is set to 0 which coupled with the err at 0 causes this error. Could my ECC bits be wrong in the header from the fpga or does the failure stem from the driver itself (setup with the device tree, etc.).

It’s could be the output signal problem, have enable debug print in the cis2_fops.c to get more information.