Custom Carrier Board Looping at Common rail init

johnrichardrinehart · February 25, 2024, 5:59am

We have a custom carrier board based on the Orin NX SOM. We did our best to go through the adapation and bring-up documentation, including generating each of the:

Pinmux
GPIO
Pad Voltage
DTSI files and creating a new .conf referencing these. However, we’re discovering that the boot process is failing, seemingly at MB1, and the logs look like:

[0000.774] I> skipped mmio_addr = 0x9241030
[0000.778] I> skipped mmio_addr = 0x9241038
[0000.782] I> skipped mmio_addr = 0x9241040
[0000.786] I> skipped mmio_addr = 0x9242000
[0000.790] I> skipped mmio_addr = 0x9242008
[0000.794] I> Task: Prod config init (0x50013e2d)
[0000.798] I> Task: Pad voltage init (0x50013a7d)
[0000.803] I> Task: Prod init (0x50013e71)
[0000.807] I> Task: Common rail init (0x500145c5)
[13:50:15.406] Disconnected
[13:50:15.950] Warning: Could not open tty device (No such file or directory)
[13:50:15.950] Waiting for tty device..
[13:50:16.104] Connected
[0000.449] I> allocated(CO:43) base:0x474000000 size:0x4000000 align: 0x200000
[0000.456] I> allocated(CO:20) base:0x472000000 size:0x2000000 align: 0x2000000
[0000.463] I> allocated(CO:24) base:0x470000000 size:0x2000000 align: 0x2000000
[0000.470] I> allocated(CO:28) base:0x46e000000 size:0x2000000 align: 0x2000000
[0000.477] I> allocated(CO:22) base:0x46d000000 size:0x1000000 align: 0x1000000
[0000.484] I> allocated(CO:35) base:0x46c200000 size:0xe00000 align: 0x10000
[0000.491] I> allocated(CO:02) base:0x46b800000 size:0x800000 align: 0x800000
[0000.498] I> allocated(CO:03) base:0x46b000000 size:0x800000 align: 0x800000
[0000.505] I> allocated(CO:06) base:0x46a800000 size:0x800000 align: 0x800000
[0000.512] I> allocated(CO:10) base:0x46a000000 size:0x800000 align: 0x800000
[0000.519] I> allocated(CO:56) base:0x469800000 size:0x800000 align: 0x200000
[0000.526] I> allocated(CO:07) base:0x469400000 size:0x400000 align: 0x400000
[0000.533] I> allocated(CO:33) base:0x469000000 size:0x400000 align: 0x200000
[0000.540] I> allocated(CO:23) base:0x46c000000 size:0x200000 align: 0x200000
[0000.546] I> allocated(CO:01) base:0x468f00000 size:0x100000 align: 0x100000
[0000.553] I> allocated(CO:04) base:0x468e00000 size:0x100000 align: 0x100000
[0000.560] I> allocated(CO:05) base:0x468d00000 size:0x100000 align: 0x100000
[0000.567] I> allocated(CO:08) base:0x468c00000 size:0x100000 align: 0x100000
[0000.574] I> allocated(CO:09) base:0x468b00000 size:0x100000 align: 0x100000
[0000.581] I> allocated(CO:15) base:0x468a00000 size:0x100000 align: 0x100000
[0000.588] I> allocated(CO:17) base:0x468900000 size:0x100000 align: 0x100000
[0000.595] I> allocated(CO:27) base:0x468800000 size:0x100000 align: 0x100000
[0000.602] I> allocated(CO:42) base:0x468700000 size:0x100000 align: 0x100000
[0000.609] I> allocated(CO:54) base:0x468680000 size:0x80000 align: 0x80000
[0000.615] I> allocated(CO:34) base:0x468670000 size:0x10000 align: 0x10000
[0000.622] I> allocated(CO:47) base:0x468200000 size:0x400000 align: 0x200000
lines 204-244/290 83%
[0000.774] I> skipped mmio_addr = 0x9241030
[0000.778] I> skipped mmio_addr = 0x9241038
[0000.782] I> skipped mmio_addr = 0x9241040
[0000.786] I> skipped mmio_addr = 0x9242000
[0000.790] I> skipped mmio_addr = 0x9242008
[0000.794] I> Task: Prod config init (0x50013e2d)
[0000.798] I> Task: Pad voltage init (0x50013a7d)
[0000.803] I> Task: Prod init (0x50013e71)
[0000.807] I> Task: Common rail init (0x500145c5)
[13:50:15.406] Disconnected
[13:50:15.950] Warning: Could not open tty device (No such file or directory)
[13:50:15.950] Waiting for tty device..
[13:50:16.104] Connected
[0000.449] I> allocated(CO:43) base:0x474000000 size:0x4000000 align: 0x200000
[0000.456] I> allocated(CO:20) base:0x472000000 size:0x2000000 align: 0x2000000
[0000.463] I> allocated(CO:24) base:0x470000000 size:0x2000000 align: 0x2000000
[0000.470] I> allocated(CO:28) base:0x46e000000 size:0x2000000 align: 0x2000000
[0000.477] I> allocated(CO:22) base:0x46d000000 size:0x1000000 align: 0x1000000
[0000.484] I> allocated(CO:35) base:0x46c200000 size:0xe00000 align: 0x10000
[0000.491] I> allocated(CO:02) base:0x46b800000 size:0x800000 align: 0x800000
[0000.498] I> allocated(CO:03) base:0x46b000000 size:0x800000 align: 0x800000
[0000.505] I> allocated(CO:06) base:0x46a800000 size:0x800000 align: 0x800000
[0000.512] I> allocated(CO:10) base:0x46a000000 size:0x800000 align: 0x800000
[0000.519] I> allocated(CO:56) base:0x469800000 size:0x800000 align: 0x200000
[0000.526] I> allocated(CO:07) base:0x469400000 size:0x400000 align: 0x400000
[0000.533] I> allocated(CO:33) base:0x469000000 size:0x400000 align: 0x200000
[0000.540] I> allocated(CO:23) base:0x46c000000 size:0x200000 align: 0x200000
[0000.546] I> allocated(CO:01) base:0x468f00000 size:0x100000 align: 0x100000
[0000.553] I> allocated(CO:04) base:0x468e00000 size:0x100000 align: 0x100000
[0000.560] I> allocated(CO:05) base:0x468d00000 size:0x100000 align: 0x100000
[0000.567] I> allocated(CO:08) base:0x468c00000 size:0x100000 align: 0x100000
[0000.574] I> allocated(CO:09) base:0x468b00000 size:0x100000 align: 0x100000
[0000.581] I> allocated(CO:15) base:0x468a00000 size:0x100000 align: 0x100000
[0000.588] I> allocated(CO:17) base:0x468900000 size:0x100000 align: 0x100000
[0000.595] I> allocated(CO:27) base:0x468800000 size:0x100000 align: 0x100000
[0000.602] I> allocated(CO:42) base:0x468700000 size:0x100000 align: 0x100000
[0000.609] I> allocated(CO:54) base:0x468680000 size:0x80000 align: 0x80000
[0000.615] I> allocated(CO:34) base:0x468670000 size:0x10000 align: 0x10000
[0000.622] I> allocated(CO:47) base:0x468200000 size:0x400000 align: 0x200000
[0000.629] I> allocated(CO:72) base:0x468000000 size:0x200000 align: 0x10000
[0000.636] I> allocated(CO:48) base:0x468650000 size:0x20000 align: 0x10000
[0000.643] I> allocated(CO:69) base:0x468630000 size:0x20000 align: 0x10000
[0000.649] I> allocated(CO:49) base:0x468620000 size:0x10000 align: 0x10000
[0000.656] I> allocated(CO:50) base:0x468610000 size:0x10000 align: 0x10000
[0000.663] I> NSDRAM base: 0x80000000, end: 0x468670000
[0000.668] I> Task: Thermal check (0x50021dad)
[0000.672] I> max_chip_limit = 105
[0000.675] I> min_chip_limit = -28
[0000.678] I> max temp read = 35
[0000.681] I> min temp read = 34
[0000.684] I> Task: Update FSI SCR with thermal fuse data (0x50021eb9)
[0000.691] I> Task: Enable WDT 5th expiry (0x50021a99)
[0000.696] I> Task: I2C register (0x50000b85)
[0000.700] I> Task: Reset FSI (0x50014901)
[0000.704] I> Task: Pinmux init (0x500139cd)
[0000.708] I> skipped mmio_addr = 0x9240008
[0000.712] I> skipped mmio_addr = 0x9240000
[0000.716] I> skipped mmio_addr = 0x9240010
[0000.720] I> skipped mmio_addr = 0x9240018
[0000.724] I> skipped mmio_addr = 0x9240020
[0000.728] I> skipped mmio_addr = 0x9240030
[0000.732] I> skipped mmio_addr = 0x9240028
[0000.735] I> skipped mmio_addr = 0x9240038
[0000.739] I> skipped mmio_addr = 0x9240040
[0000.743] I> skipped mmio_addr = 0x9240048
[0000.747] I> skipped mmio_addr = 0x9241000
[0000.751] I> skipped mmio_addr = 0x9241008
[0000.755] I> skipped mmio_addr = 0x9241010
[0000.759] I> skipped mmio_addr = 0x9241018
[0000.763] I> skipped mmio_addr = 0x9241020
[0000.767] I> skipped mmio_addr = 0x9241028
[0000.771] I> skipped mmio_addr = 0x9241030
[0000.775] I> skipped mmio_addr = 0x9241038
[0000.779] I> skipped mmio_addr = 0x9241040
[0000.783] I> skipped mmio_addr = 0x9242000
[0000.787] I> skipped mmio_addr = 0x9242008
[0000.790] I> Task: Prod config init (0x50013e2d)
[0000.795] I> Task: Pad voltage init (0x50013a7d)
[0000.799] I> Task: Prod init (0x50013e71)
[0000.803] I> Task: Common rail init (0x500145c5)
[13:50:16.686] Disconnected

This looks like it might be related to the power sequencing in the initial phases of the boot process. Any ideas what we might need to configure differently through the pinmux configuration spreadsheet in order to ameliorate this problem?

KevinFFF · February 26, 2024, 3:29am

Hi johnrichardrinehart,

What’s your Jetpack version in use?

It seems no error in MB1.
Do you boot up stuck at the last line of your log?

Is your serial console unstable so that it keeps re-connecting?

johnrichardrinehart · February 26, 2024, 4:35am

@KevinFFF Thanks for your prompt response.

What’s your Jetpack version in use?

35.3.1, I believe.

It seems no error in MB1.

I don’t see an error message. I don’t think I said that I saw an error message. I’m saying that the boot process won’t continue past:
[0000.803] I> Task: Common rail init (0x500145c5)

So, I’m asking if (guessing that it’s) an MB1 log message (I think that “initializing common rail voltages” is part of MB1).

Do you boot up stuck at the last line of your log?

It doesn’t get stuck - the board resets. The logs (obtained over the serial interface) that I provided shows 2 complete cycles (and a bit of the preceding cycle at the very beginning). So, it doesn’t get stuck - it just loops forever and never overcomes/gets past/continues beyond:
[0000.807] I> Task: Common rail init (0x500145c5)

Please note that the Connected and Disconnected log lines are printed by the serial device software (tio) not the SOM. So, it’s clear that the board is resetting.

KevinFFF · February 26, 2024, 5:47am

Get it, but I’m curious about why there’s no MB1 version info like the following in you log.

[0046.358] I> MB1 (version: 1.2.0.0-t234-54845784-562369e5)
[0046.363] I> t234-A01-0-Silicon (0x12347) Prod
[0046.368] I> Boot-mode : Coldboot

Could you provide the full serial console log for further check?

Have you also compared the power sequence of your custom carrier board with the devkit?

johnrichardrinehart · February 26, 2024, 8:07am

I’m also curious. Maybe the serial tool is writing on top of those lines. I’ll play with the settings to see if I can capture those lines since they seem to be printed immediately before our first log lines.

We haven’t. You mean the electrical configuration of the carrier board relative to the SOM, right? What things, specifically, should we look for (which pins, which state)? Do we need an oscilloscope (timing/waveforms) or is a multimeter sufficient (simple/static voltage values)?

Trumany · February 26, 2024, 9:38am

The sequence like below showing in Design Guide doc.

system · March 27, 2024, 2:53am

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Custom Carrier Board Looping at Common rail init

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