Hi, it looks like for TX2-4G internal voltages, the highest rail is 5V0 volt. Why is the spec minimum input voltage starts at 9.0V? Is there a way to change this down to 6.5V? (for two Li-Ion cells).
How does the P2597 carrier set the minimum input voltage as we switch the SOM from TX2-4G to TX2?
The input voltage range is requested by module design and should not be changed. Carrier board has no setting on input voltage, it is set by external power supply which should be in the requested range.
So if I design a custom carrier that will be able to accept either the TX2 or the TX2-4G, how will I generate the VIN_PWR_BAD# signal, as it is set for 5.5V for TX2 but 9.0V for TX2-4G?
Also, in reviewing the meaning of signal VIN_PWR_BAD#, I am confused by the two documents:
1- from the Jetson TX2 datasheet, the VIN_PWR_BAD# is an input to the module from the carrier.
“Carrier board indication to the module that the VDD_IN power is not valid. Carrier board should de-assert this (drive high) only when VDD_IN has reached its required voltage level and is stable. This prevents Tegra from powering up until the VDD_IN power is stable.”
2- from the Jetson TX2 series Interface Comparison and Migration, VIN_PWR_BAD# is an output from the module.
“Jetson TX2 4GB and Jetson TX2i implement a VIN monitor using a TPS3808 Supervisor to ensure VDD_IN is valid. If VDD_IN is out of range, the supervisor will assert VIN_PWR_BAD#.”
Which one is correct?
Trumany, could you please comments on my issues?
VIN_PWR_BAD# is an input to module to indicate VDDIN is not “good”. You only need to follow the OEM DG and ref schematic to do related design, no need to concern 5.5V or 9V limit. And so choose the power supply which is in the voltage range of TX2 or TX2 4G.