Can you please elaborate on CVNAS functionality?
hello efiryw2d ,
I would like to confirm which documentation you’re referred to, thanks
it’s Computer Vision NoC and SRAM,
there’s cvnas driver, it does direct register writes into the HW.
you could have configuration through nvpmodel, it’s a device attribute,
clk_cap to limit cvnas clock.
please check the driver for more details.
Thanks! Very helpful
OK… What do you mean NoC?
CVNAS provides a high bandwidth, low latency SRAM for CV cluster. CVNAS consists of 2 main blocks: CV-NOC and CV-SRAM;
CV-NOC is a sub-block within CVNAS. It is the NOC portion of CVNAS.
CV-SRAM is another a sub-block within CVNAS, It is the memory storage portion of CVNAS.
please access Xavier TRM for the details.
Thanks a lot!!