Data Transfer Using PCIe Communication

[Thirumalesh]

Hii,

I’m Using 2 Agx orin for PCIe Communication. using R36.4.3 release.

as per the Document one board configured as End point and another board configured as Root port.

I started the cat edmalib_test on Endpoint and I got the Success log on that
EndPoint.txt (5.2 KB)
RootPort.txt (10.2 KB)

but on the root port side i did n’t received any data from end point on the kernel log.

Can you please tell me How can i Transfer the data between EP and RP

[Thirumalesh]

Hi nvidia ,

I need one clarification from nvidia.
Data is transferred in kernel level between two agx-orin evolution board.

if i power ON the two agx-orin at same time and I configured the End port but Root port is not detecting End port.

If i Power OFF and power ON the Root port then it is detecting.

Why it is working like this?

[Thirumalesh]

In custom board I am getting error log.
Please look into attachment,
PCIeBootErrorLog.txt (7.7 KB)

Why this error are getting .

[kayccc]

Please refer to those steps in PCIe Endpoint Mode — NVIDIA Jetson Linux Developer Guide

[Thirumalesh]

Hi sir,
I want to sent video file pcie to pcie.
Is there any reference to guide us.

[kayccc]

For application and use case, we don’t have the reference, and you may need to do your own study.