Device level power management in Jetson Nano

Hi NVIDIA,

I have gone through the power management framework for Jetson Nano which is illustrated in the documentation. There is good explanation on “System Wide” power management. Can you please guide on how to achieve “Device Level” Power management on Jetson Nano from user space and kernel space perspective? Is it possible to perform power gating for power domains?

Thanks and Regards

Hi karthik.rao,

From user space, “nvpmodel” utility (command line utility) or “nvpmodel_indicator” (GUI utility) can be used to put device into different power mode states which will be achieved by tuning, CPU, GPU, EMC frequencies, CPU hotplug etc.
Power gating, clock gating, cpu idle can be used through kernel space to do the device level power management.

Power Gating:
Power gating is possible for power domains using kernel APIs.
Below are the examples of using kernel APIs to power gate the domains:
drivers/media/platform/tegra/mipical/mipi_cal.c: tegra_powergate_partition(mipi->soc->powergate_id);
drivers/pinctrl/pinctrl-tegra186-dpaux.c: ret = tegra_unpowergate_partition(tdpaux_ctl->powergate_id);

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