Differences between Jetson TX2 revisions B02,D00, and D02

Autonomous Machines Jetson & Embedded Systems Jetson TX2
1

Is there functional differences between different Jetson TX2 board revisions?
I encountered some anomaly when using Jetpack 3.3.3 , 4.4 and 4.4.1 versions on B02 and D02 module revisions. D00 is working presumably as same as B02 (not 100 % sure what memory is in D00)

B02 is using Samsung 8Gb per die memories while D02 is using Micron 16Gb per die memory.
However when checking from U-boot and from Linux available memory is not the same with B02 and D02 revision modules.

U-boot reports roughly 7.8 gigabytes available memory on B02 revision board with Jetpacks 3.3.3 ,4.4 and 4.4.1. However D02 reports only 7.7 gigabytes of available memory.

See details below:

U-boot bdinfo from B02 and Jetpack 4.4.1

arch_number = 0x00000000
boot_params = 0x00000000
DRAM bank = 0x00000000
→ start = 0x80000000
→ size = 0x70000000
DRAM bank = 0x00000001
→ start = 0xF0200000
→ size = 0x185600000
DRAM bank = 0x00000002
→ start = 0x275E00000
→ size = 0x00200000
DRAM bank = 0x00000004
→ start = 0x277000000
→ size = 0x00200000

< removed most of empty banks due size restriction in post>

DRAM bank = 0x00000400
→ start = 0x00000000
→ size = 0x00000000
DRAM bank = 0x00000401
→ start = 0x00000000
→ size = 0x00000000
baudrate = 115200 bps
TLB addr = 0xFFFF0000
relocaddr = 0xFFF37000
reloc off = 0x7FEB7000
irq_sp = 0xFFB2E210
sp start = 0xFFB2E210

U-boot bdinfo from D02 and Jetpack 4.4.1

arch_number = 0x00000000
boot_params = 0x00000000
DRAM bank = 0x00000000
→ start = 0x80000000
→ size = 0x70000000
DRAM bank = 0x00000001
→ start = 0xF0200000
→ size = 0x179E00000
DRAM bank = 0x00000002
→ start = 0x26A600000
→ size = 0x00200000
DRAM bank = 0x00000003
→ start = 0x26AE00000
→ size = 0x00200000

< removed most of empty banks due size restriction in post>

DRAM bank = 0x00000400
→ start = 0x00000000
→ size = 0x00000000
DRAM bank = 0x00000401
→ start = 0x00000000
→ size = 0x00000000
baudrate = 115200 bps
TLB addr = 0xFFFF0000
relocaddr = 0xFFF37000
reloc off = 0x7FEB7000
irq_sp = 0xFFB2E210
sp start = 0xFFB2E210

Also sheer amount of DRAM banks in both cases is overwhelming. However main issue is that with B02 DRAM Bank 1 has settings like:

DRAM bank = 0x00000001
→ start = 0xF0200000
→ size = 0x185600000

However with D02 this not the same:

DRAM bank = 0x00000001
→ start = 0xF0200000
→ size = 0x179E00000

Difference is around 184 megabytes, which is bit odd from my point of view as there should not be size difference.
Rest of the valid DRAM banks are the same in both revisions (however, why there is so many empty DRAM banks defined is beyond me).

Any ideas what is causing this?

3

Hi, there should be no functional difference among them. There might be some memory config difference on memory chip of different vendor which is acceptable. You can file a topic if really meet a issue on this.

4

Hi,

From related PCN I got impression that Jetpack 3.3.3 and Jetpack 4.4 (or later) should have support for the Micron memory. With Jetpack 3.2 where support does not exist, D02 revision board which we have, will not boot correctly as there is no memory configuration present for the Micron memory. With 4.4.1 device boots correctly, but amount of memory available is not the same as with B02 revision board.

I’ll discuss internally at our end how this will be handled.

7

Hello,Ochnudemus
Jetpack4.2 also not support TX2 D02 modules,do you find a way to solve this issue?

8

Not for missing 184 megabytes, but backporting RAM configuration from 4.4.1 to 3.x series makes D02 boards boot (and apparently work okay) with earlier Jetpacks.

9

@Ochnudemus considering the typical Nvidia customer support level is very nice to hear that.

Please,
could you provide some hint to make this change?

Regards and many thanks

10

Hi,
@Trumany. In the JetsonTX2 Major Product/Process Change Notice ( under Recommended Action for Customers ) there is a section that NVIDIA can provide customers with the necessary patches to get an older JetPack working with the new D02 modules. Do you know where can I find said patches?

I tried using the P3310_A00_8GB_Samsung_8GB_lpddr4_204Mhz_A02_l4t.cfg from 28.4 in 28.2 but there are still some kernel panics concerning some __tegra_isomgr_register.

[    5.596405] Call trace:
[    5.596414] [<ffffffc000893e2c>] __tegra_isomgr_register+0x30c/0x4d4

Thanks

11

Please contact your local nvidia sales for this request.

12

Thanks,
siliconhighway informed me that there is a overlay for L4T 28.2.1 (PCN206440 Overlay) to use the D02. In this overlay is a new Linux Kernel and CBoot binary. Is the source code for the Overlay Linux Kernel and CBoot binary available somewhere? We are building our Linux Kernel and CBoot binary ourselves based on the L4T 28.2.1 source code so the binaries alone in that overlay don’t really help us.

13

I can provide you the kernel src patch later.
But actually, we provide rel-28.2.1 patch in form of binary because we didn’t release r28.2.1 cboot source at all.
Thus, I have no idea what kind of cboot source you are using now.

1 Like
14

Thanks @WayneWWW. I was not the original author of our modified cboot Version but I think he got it here ( https://developer.nvidia.com/embedded/linux-tegra-r2821 ). If there is no c-boot source code for this patch is the c-boot source code for 28.4 available somewhere so that I can figure out the neccessary changes this way?

15

Sorry, my mistake. It should be rel-32.1/32.2 that has no cboot source. Took the wrong version here.

I will check which patch is applied to rel-28.2.1 and share it here.

1 Like
16

for kernel patch

diff --git a/arch/arm64/configs/tegra18_defconfig b/arch/arm64/configs/tegra18_defconfig
index a4974a172142..55bc3b58c7be 100644
--- a/arch/arm64/configs/tegra18_defconfig
+++ b/arch/arm64/configs/tegra18_defconfig
@@ -44,7 +44,6 @@ CONFIG_MODULE_FORCE_UNLOAD=y
 CONFIG_BLK_DEV_THROTTLING=y
 CONFIG_PARTITION_ADVANCED=y
 # CONFIG_IOSCHED_DEADLINE is not set
-CONFIG_CFQ_GROUP_IOSCHED=y
 CONFIG_ARCH_TEGRA=y
 CONFIG_PCI=y
 CONFIG_PCI_TEGRA=m
@@ -504,6 +503,7 @@ CONFIG_MMC=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_PLTFM=y
 CONFIG_MMC_SDHCI_TEGRA=y
+CONFIG_MMC_CQ_HCI=y
 CONFIG_LEDS_THINE350X=y
 CONFIG_SWITCH=y
 CONFIG_NVPMODEL_EMC=y
-- 
2.17.1
1 Like
17

For cboot

diff --git a/drivers/sdmmc/tegrabl_sdmmc_protocol.h b/drivers/sdmmc/tegrabl_sdmmc_protocol.h
index 43f612f2..87e21b6f 100644
--- a/drivers/sdmmc/tegrabl_sdmmc_protocol.h
+++ b/drivers/sdmmc/tegrabl_sdmmc_protocol.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2015-2016, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2015-2020, NVIDIA CORPORATION.  All rights reserved.
  *
  * NVIDIA CORPORATION and its licensors retain all intellectual property
  * and proprietary rights in and to this software, related documentation
@@ -19,7 +19,7 @@
 #define COMMAND_TIMEOUT_IN_US					100000
 
 /* OCR register polling timeout */
-#define OCR_POLLING_TIMEOUT_IN_US				500000
+#define OCR_POLLING_TIMEOUT_IN_US				1000000
 
 /* Timeout from controller side for read to be completed */
 #define READ_TIMEOUT_IN_US						200000
-- 
2.17.1
1 Like
18

Thank you very much @WayneWWW.